Research Of Digital HDTV And Multimedia Related Technology

Digital audio and video processing technology is the engine of multimedia application in recent years. From digital TV to Internet, from mobile communication to remote monitoring, people change their way for obtaining information. Audio and video compression is the core technology of digital audio and video processing. Because of the complex compression algorithm, audio and video codec are mainly implemented by ASIC now. Especially when decoding HDTV video stream, all the decoders are implemented by ASIC.To assist the development of first HDTV video decoding ASIC in China, a platform for testing this ASIC is implemented in this thesis. For people who want to use this ASIC, this platform is also a design reference. The hardware core of this platform is a MIPS CPU-RC32334 RISC processor. Demultiplex and audio decoding ASIC are also embedded into this system. PCI is used as communication interface between the platform and the video decoding ASIC. The RTOS of the whole system is VxWorks. This thesis next presents MPEG-4 SP video decoder and MPEG-4 AAC decoder. These two decoders are based on the Trimedia TM-1300 media processor. By performing several optimizations for the decoding algorithm and using custom operation of TM-1300, these two decoders only consume 38% CPU processing ability. So the whole system keeps the potential ability to upgrade to a more complex algorithm. These two decoders become the main engine of an ISMA decoder based on TM-1300.At last, this thesis designs a HDTV video software decoder based on TMS320C64xx general purpose DSP. Considering the structure of TMS320C64xx, several optimizations have been made. Variable length decoding, IDCT and motion compensation are coded in parallel assemble language. By evaluating the object code on TMS320C64xx software simulator, we can make several conclusions: 1) The CPU cycles consumed after assemble optimization is one seventh of the cycles before optimization; 2) After assemble optimization, this video software decoder only consumes 228.8MHz CPU cycles; 3) When decoding hi-definition video bit-stream, about 1GHz CPU cycles will be consumed. This research is very important for implementing a HDTV video decoder by using general purpose DSP. It promotes the development of DSP usage in consumer electronic application field.