A Study On High-Level Synthesis Algorithm And Software In The New Theory Of High-Speed ASIC

With the growing of scale of Application Specific Integrated Circuits and popularizing of its application, there is a great demand for making short design period and decreasing design difficulty, so that the circuits and systems engineers without knowledge about digital 1C technique can also take part in the process of 1C design. High-Level Synthesis (HLS) systems for digital 1C are playing such a role. Now HLS has absorbed much research attention in IC-CAD field. In HLS, algorithms represented by algorithm description language (e.g. VHDL) are transformed into hardware structure description consisted of resisters and transfers. In the transforming process, synthesis of datapath is a core. The other works is based on it. And in the synthesis of datapath, operation scheduling, functional unit allocation and binding all are NP-Completeness problems. The structure of their solution space is not known well. If we must find a global optimum solution, we can only use exhaustion. This way needs too much computation for VLSI synthesis, and is impractical in Industry. So usually heuristic algorithms are used to search suboptimum solution.Evolution Programs are heuristic optimization methods with perfect performance developed recently. EPs simulate the mechanism of natural evolution, and manipulate a population of potential solutions to search the whole solution space of an optimization problem. EPs' property make them fit for HLS problem. There are some researches in the world concentrating on Genetic Algorithms' application to HLS. But the methods used are too rough, with poor computation efficiency and quality of solution improvable, can not meet the need of complex technique of 1C nowadays. There are necessity and headroom for improvement. This paper presents an approach to datapath synthesis based on an evolution program > which combines an evolution program with a known heuristic algorithm to search the larger design space in an intelligent manner. And with the objective of minimizing the cost function of the hardware resources and the total time of execution, a global optimization of scheduling, allocation and datapath synthesis of thetypical differential equation circuit using knowledge based EP are discussed here. In order to further improve the quality of HLS design systems, this paper deeply analyze the process of datapath synthesis, and presents a practical interconnect unit allocation algorithm.This paper deeply researches the algorithms of HLS in the new theories, and presents a practical interconnect unit allocation algorithm, and its' goal is to give algorithmic schemes of HLS and databases of the software' realization. So that it can provide service for setting up a more applied and efficient HLS prototype system in the future.