Research Of Novel ESD Protection Devices For Integrated Circuits

The ESD (Electrostatic Discharge) protection design of integrated circuits plays an important role to improve the reliability of integrated circuits and electronic systems. Under the backgrounds of understanding the fundamentals of integrated circuits ESD protection, some creative works were done for practical engineering of ESD protection design by theoretical analysis, TCAD (Technology Computer Aided Design) simulation, silicon experiments and measurements, aiming to satisfy the specific ESD protection requirements, where the most creative work is designing novel ESD protection devices. The following gives the details of the research contents:1. A novel device called GGISCR (Gate-Grounded-nMOS Incorporated Silicon Controlled Rectifier) is proposed in a 0.35μm CMOS process. Compared with traditional LVTSCR (Low Voltage Triggered Silicon Controlled Rectifier) device, the holding voltage is raised to 7.9V, neither adding any silicon area nor lowing the device robustness, thus alleviating the contradiction among device area, robustness and holding voltage, which is always a trade-off in traditional ESD protection devices. A GGISCR device with 40μm width achieves the It2 of 4.4A, guaranteeing to satisfy the commonly used 2KV HBM (Human Body Model) and 200V MM (Machine Model) standards for component level ESD protection. TCAD tools are carried out to have an intuitive insights into the critical physical quantity including electric field, current density, impact ionization and so on, with which the device operation mechanism is well analyzed and illustrated.2. Based on 0.35μm BCD (Bipolar CMOS DMOS) process, the GGISCR is redesigned and applied as a power clamp for high voltage circuits ESD protection by stacking method to achieve much higher holding voltage. Utilizing the peculiarity of BCD process, the characteristics of GGISCR device is further optimized and a small size GGLDMOS device is placed as a monitor parallel with GGISCR device to investigate its protection effectiveness. Through adjusting the stacking device number, the stacked GGISCR devices can provide non-latchup ESD protection ability both for 18V and 24V high voltage power clamp. The It2 of all the devices reach 3.5A.3. An designed novel ESD protection device is called FP-LDMOS-SCR (Floating P+Lateral Double-diffused MOS Silicon Controlled Rectifier) and it’s applied for I/O ESD protection in 0.35μm BCD. The inserted floating P+region improves the device’s It2 to 2.7A, without any impact on its normal operation Ⅰ-Ⅴ curve. Due to its unique mechanism, the risk of latchup is reduced a lot.4. A LDMOS-SCR device is designed in the 0.35μm 80V BCD process, of which the TLP measured failure current is 4.3A. Through inserting a FOX in the drain end, the breakdown voltage of LDMOS-SCR device is improved from 92V to 99V. The characteristics of breakdown is also investigated in depth.5. In addition, the layout of GGISCR device is optimized to accomplish a ring type layout device with ultra-high It2 of 18.9A, meeting the IEC61000-4-215KV contact discharge standard. As a point view of system level ESD protection design, a synthesized FOM (Figure of Merit) is used to estimate the device performance. The ring type device has a FOM value of 137AV/pF, which is 73% higher than traditional multi-finger device.6. In order to satisfy system level ESD protection of high speed interface circuits, a novel TVS device with five-layer N++P+PP+N++ structure is proposed. With 12-finger layout, the device achieves an It2 of more than 10A and a parasitic capacitance of 0.17pF, which meet the ESD protection requirement of high speed interface circuits, like USB3.0 and HDMI1.4.