Low Inductance SiC Mosfet Power Module Structure Design And Optimization

With the increasing application requirements of power devices,the traditional Si-based devices can no longer meet the requirements.SiC MOSFET has higher switching speed and lower loss than Si IGBT.The high parasitic inductance in traditional packaging structure leads to the high voltage stress introduced by SiC MOSFET in the process of high frequency switching.Therefore,it is of great significance to design the SiC MOSFET power module packaging structure with low parasitic inductance to give full play to the advantages of SiC MOSFET devices.In this paper,the switching process,parasitic parameters and the influence of parasitic parameters on the switching process are studied in depth,and then the influence of the module structure on the thermal characteristics is further studied.Finally,a SiC MOSFET power module structure with low parasitic inductance and good heat dissipation is designed.First of all,based on the switching process of power module,this paper proposes a low inductance package structure of SiC MOSFET power module.Through modeling,simulation and analysis of the main part of the parasitic inductance of power module,the bonding line and power terminal,Based on this,the proposed low inductance package structure is optimized and parasitic parameters are extracted from the overall structure of SiC MOSFET power module.The results show that the parasitic inductance of SiC MOSFET power module converter circuit designed in this paper is 7.13nH.Then,the spice equivalent circuit of SiC MOSFET power module with parasitic inductance was extracted and combined with the extracted parasitic parameters to build a double pulse simulation.The results show that the peak voltage generated by SiC MOSFET power module at the turn-off time is 1.301kV.The comparison module is 1.3954kV,and the overvoltage of SiC MOSFET is optimized by 48.3%compared with the comparison module.Then,based on this,the influence of parasitic parameter distribution of SiC MOSFET power module on the switching process is further studied.At the same time,the problem of inconsistent parasitic parameters of up-down converter circuit brought by such DBC chip layout is explored,and the optimization reference is given.Finally,the influence factors of thermal characteristics of the SiC MOSFET power module are studied.The heat loss of the chip is obtained by the double pulse simulation of the SiC MOSFET power module.Based on this,the finite element steady-state thermal simulation of the SiC MOSFET power module is carried out.After consideration,0.1mm Sinter Ag is selected AS the chip solder layer,0.1mm 96Sn3.5AgCu as the DBC solder layer,0.5mm AlN as the ceramic layer,2mm AS-SC80h as the cooling base of SiC MOSFET power module.Finally,the feasibility of low parasitic inductance and good heat dissipation is verified by temperature cycle simulation,which has reference significance for improving the electric heating performance of the module.