Since the research on Si materials has approached the physical limit,SiC materials with better material properties become the focus of power semiconductor chip research.compared with the conventional Si IGBT structure,SiC MOSFET chips have the advantages of high voltage level,fast switching speed and low operating loss.These advantages also bring higher requirements for power module packaging technology,therefore,the study of the packaging technology of SiC power module based on SiC MOSFET chip has important theoretical value and practical application value.This thesis aims at the electromagnetic design of SiC MOSFET multi-chip parallel half-bridge power module packaging.Therefore we focus on the optimization of stray parameters in power module,the parallel current sharing ability of multi-chip power module,and the packaging electromagnetic design of power module.The main research contents and results are as follows:(1)Based on the half-bridge structure and simulation method,the internal stray parameters of the power module are studied,which conclude an optimization method for the package design of the power module to adjust the stray parameters.Firstly,the effect of the stray inductance of each part for the typical half-bridge module on the dynamic switch of the module is analyzed by control variable method and circuit simulation.finally,combined with the finite element simulation,the shape of the package structure inside the module is modeled and simulated.(2)The influence factors and improvement methods of parallel current sharing of half-bridge modules with three chips in parallel are studied with simulation.Firstly,the unbalanced factors of multi-chips in parallel in the module are conclude,and then the current unbalanced factors caused by the imbalance of different stray parameters among the branches of the module are simulated and analyzed by using the method of control variables and circuit simulation.In addition,an optimization method for current imbalance caused by internal stray parameters of the module is proposed.Finally,a chip source interconnection method which can be used for the imbalance of source spurious parameters in the module is proposed.Through LTspice simulation tests,the imbalance of multi-chip parallel circuits caused by the imbalance of source parameters can be effectively reduced.(3)Based on stray parameter optimization method and parallel current sharing optimization way,a 1200 V three-chip parallel SiC MOSFET power module is designed and tested.Firstly,the design optimization and simulation are carried out by using the method of parameter optimization and current-sharing ability improvement,and then the process steps used in the power module packaging are described.finally,the double-pulse test method is applied to test the designed module.After testing: the parasitic inductance of the module made in this thesis is 7n H,and the current imbalance of each branch is 5.34% and4.33% respectively,which verifies the applicability of stray parameters and parallel current sharing energy optimization method. |