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Structural Design And Simulation Of SiC MOSFET Power Module

Posted on:2022-09-23Degree:MasterType:Thesis
Country:ChinaCandidate:M ZhaoFull Text:PDF
GTID:2518306512971419Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
In recent years,wide bandgap semiconductor devices represented by SiC have received extensive attention from all walks of life and have become a research hotspot.Among them,SiC MOSFET has become the first choice for high power density power electronics applications due to its high-voltage,high-frequency and high-temperature characteristics.This article mainly analyzes the impact of the package structure and circuit parameters of the 1200V/660A SiC MOSFET module on the thermal characteristics,parasitic parameters and switching characteristics of the module,and provides a feasible reference for the structural design of the SiC MOSFET module.First of all,this article introduces the structure of SiC MOSFET module.Based on the analysis of the existing commercial module DBC layout,an improved DBC layout structure is proposed.This structure not only has a compact layout,but also reduces the area of the power loop and is embedded the decoupling capacitor is used to reduce the current and voltage spikes generated during the switching process.In addition,a Kelvin source structure is added to the module to separate the power loop and the gate loop to reduce the coupling between the two.Secondly,use the established finite element package structure model to analyze the influence of the thickness and material of the main structures such as the DBC substrate,solder layer,substrate and chip layout on the thermal characteristics of the SiC MOSFET module to provide a reference for the structural optimization of the module;The parasitic parameters of the improved SiC MOSFET module are extracted by electromagnetic simulation software,and the influence of parasitic inductance and capacitance at different positions on the switching characteristics is analyzed;Based on the uneven current phenomenon that occurs in the multi-chip parallel layout structure of SiC MOSFET modules,the improvement has been made.The total parasitic inductance of different branches is equalized by changing the length of the source bonding wires of different branches,so as to achieve the effect of current sharing.Finally,in view of the reliability problems that may occur in actual working conditions,simulation tests of temperature cycles and power cycles are carried out to analyze the influence of stress and strain on the solder layer and bonding wires.At the same time,the stress and strain of the commercial module and the improved module are compared.Strain distribution provides an improved method for the packaging structure design of SiC MOSFET modules,which has reference significance and application value for improving the quality of SiC MOSFET modules.
Keywords/Search Tags:SiC power module, Finite element, Packaging design, Heat dissipation characteristics, Parasitic parameters
PDF Full Text Request
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