Research And Design Of Reconfigurable High-efficiency Distributed Power Amplifier

FRPA is the core research target of reconfigurable RF chip.The increasing demand for the integration of RF functions in tantrum pass has given a great boost to the research of ultra-wideband FRPA.The distributed topology is the best choice to achieve multi-octave bandwidth,so FRDPA has excellent development prospects.The purpose of this thesis is to solve the problem of low efficiency of distributed power amplifier by frequency reconfigurable technique,and the main works are:（1）Theoretically analyze the problems of distributed amplifier topolpgy,especially the influence of non-ideal characteristics of on-chip bias inductor on the core index under multiple octaves.Based on the non-ideal characteristics of bias circuit and impedance matching,a frequency reconfigurable technique is proposed for bias circuit reconfiguration module and resistor reconfiguration module,which can significantly improve the PAE.Finally,it is demonstrated that the frequency reconfigurable technique is important in replacing the conventional broadband amplifier with FRDPA in the future.The reconfigurable RF chip has an extremely important position in the multifunctional RF integration.The increasing demand for the integration of dry pass functions has greatly contributed to the research of ultra-wideband reconfigurable power amplifiers.Since distributed structures are the best choice for ultra-wideband over multiples,FRDPA has excellent prospects for development.（2）Based on a 0.25μm Ga N HEMT process,a 2-18GHz single-stage FRDPA chip is designed and fabricated.The performance was confirmed by simulation and testing,achieving up to 28%PAE average and 6W saturation output power typical(P_SAT)in the frequencies ranged from 2-17 GHz.The study adopted a new power supply configuration and packaging mode based on its circuit characteristics in the test,and achieved 34%PAE average and 8W P_SAT typical in in the frequencies ranged from 2-16GHz.（3）Using the same process and technology,the simulation designs a three-stage frequency reconfigurable distributed amplifier integration（integrated single-blade double-throw switch）for 8-18GHz,with the operating bands of 8-13GHz and 12-18GHz,and the power gain G_P is greater than 28d B and 27.5d B,P_SAT is greater than 39.5d Bm and37d Bm,respectively,in these two operating bands.PAE typical values reach 35%and 32%respectively.The input and output return loss are greater than 14d B.these performances once again confirm the superiority of frequency reconfigurable technique in terms of PAE.（4）Based on the 0.15μm Ga As p HEMT process,a digital serial-parallel interface design with ESD configuration is simulated and designed for the frequency reconfigurable RF chip.The chip adjusts its interference immunity and operating frequency accordingly to the requirements of the reconfigurable RF chip.The module can reach the operating frequency of 1GHz in simulation and achieve a noise margin of 0.17V at a supply voltage of 0.6V.The above research and simulation of frequency reconfigurable scheme provide a feasible way to realize the design of high efficiency broadband power amplifier.