Design Of High-Efficiency Switching Power Amplifier For Wireless Electromyography Bridge In Nano-CMOS Technology

The recovery of limb motor function of paralyzed patients is currently an important research field and is also a medical problem to be solved all over the world.By using the method of "microelectronic myoelectric bridge" to perform the functional electrical stimulation(FES)on the paralyzed limbs,the recovery of the motor coordination function can be promoted.By designing a dedicated microcircuit,it can collect natural EMG signals from healthy people and transmit them to the paralyzed limbs by wireless transceiver mode to control their orderly activation movement.Therefore,it belongs to a new concept in the intersection of circuit subject and biomedical field,which the circuit modules for EMG signal acquisition and transmission have become new design hotspots and have broad application prospects.A portable,miniaturized,low-cost,low-power "microelectronic myoelectric bridge" wireless transceiver chip is the key to promote this technique.This thesis studies the power amplifier(PA)in the "microelectronic myoelectric bridge" transmitter chip.Made the innovative research work in circuit design as follows:1)Based on the application requirements of the wearable system,a high-efficiency switching class-E power amplifier was designed at 433.92 MHz.The PA adopts 0.35-?m CMOS process,which is integrated in the transmitting chip with independent intellectual property rights.The study gives the design flow of the class-E switching PA,and points out the correlation and difference between the theoretical and practical.It also introduces the design method of the switching transistor,the driving circuit and the output matching.In addition,the process and temperature compensation are implemented on the biasing circuit,so that the bias of the switching transistor can follow the threshold voltage to ensure a stable switching operation mode.This section also gives the design considerations of the layout in detail,and introduces the design method of the power unit.The simulation and measurement show that the Class-E PA achieved the output power and efficiency required by the "microelectronic myoelectric bridge" communication,laying a theoretical foundation for the innovative design of subsequent chapters.2)Based on the 0.18-?m CMOS process,a body biased differential class-E PA with dynamic tracking is designed.By analyzing the non-ideal conditions of the switch,the adjustable parameters that can make the switching transistor close to the ideal are clear in the circuit design,and it is also concluded that the threshold voltage can affect the transition and the on-resistance characteristics of switching transistors.Therefore,this design uses a deep N-well MOS device with an independent substrate as the switch.By applying a dynamic bias to the body electrode of the transistor,it realizes the rapid transition of the switching transitors and reduces the average on-resistance simultaneously,making the transistors of the class-E PA are more like an ideal switch.The circuit also uses a differential structure to suppress even harmonics.Compared with the traditional class-E power amplifier with body-ground,the measurement results show that the efficiency and output power of the dynamic body bias Class-E PA have been significantly improved.3)A current-injection(CI)class-E PA is proposed for the first time,which effectively increases the output power and improves the voltage breakdown capability of the transistor.By analyzing the conventional method of increasing the output power,the disadvantages caused by reducing the optimal load impedance and increasing the supply voltage of the class-E PA are pointed out,and presents the idea which makes the current become an independent variable.Therefore,this design innovatively proposes the idea of current-injection and adds a current injected circuit in the class-E PA,which carries out innovative analysis and design in terms of architecture and implementation.The theoretical analysis also pointed out the reasons for the increasing of output power and the alleviation of breakdown voltage.The circuit adopted a 65-nm LP CMOS process to verify this idea.The measurement results show that the class-E CIPA effectively improves the output power without sacrificing efficiency,proving that the CI architecture can become a new type class-E model and has potential application prospects.4)The transmitter chip based on the class-E power amplifier is packaged and made into a wireless transmission module,which replaces the discrete transmission module of the "microelectronic myoelectric bridge" wireless wearable rehabilitation system,and conducted human body muscle FES test.The results prove that the new rehabilitation system can solve the problem of short-distance interference,and realize the wall penetration and long-distance communication between wards,which increase the using space of the "myoelectric bridge" and the degree of freedom.It has confirmed the function of the transmitter chip with independent intellectual property right in practical application.5)Based on the class-E PA and adopted 0.18-?m CMOS process,this chapter design a small transmitter chip.The Class-E PA of that is transplanted from 0.35-?m CMOS process to0.18-?m CMOS,and replaces the double-ended crystal to a single-ended crystal oscillator IP.This design also introduces the phase-locked loop,band gap and bias module IP,and fine-tunes the corresponding module according to the system requirements.This design also gives the method of PA proportional transplantation and considerations in a key position.The chip was tape-out after layout design.The measurement results show that the transmitter chip can reach 13.39-d Bm output power and the overall efficiency of the chip is close to 40% at 1.8 V.Therefore,the effectiveness of the transplant design is verified.In view of the fact that the wireless receiving chip of the paralysis limb motor function rehabilitation device has been implemented using the 0.18-?m CMOS process,the study lays the foundation for the design of the integrated transceiver chip under the same process in the future.