| With the development of MEMS process technology,the pixel array of uncooled infrared detectors is getting larger and larger,while the working voltage of the readout circuit is getting smaller and smaller,and the readout circuit puts forward higher requirements for the speed and accuracy of the Analog to Digital Converter(ADC).In the column-level ADC of the uncooled infrared focal plane detector readout circuit,the single-slop(SS)ADC has a wide range of applications in column-level ADC due to its simple structure and quantization principle,ramp generator and counter can be shared.However,the disadvantages of single-slop ADCs are also very obvious,their conversion speed is very slow,and for N bits single-slop ADC to complete a conversion requires at least 2~N clock cycles.Therefore,improving the conversion speed and conversion accuracy of single-slop ADCs is of great significance for their application in column-level ADCs.In view of the shortcomings of slow conversion speed and low conversion accuracy of traditional column-level single-slope ADCs,this thesis adopts the two-step quantization principle,based on the same ramp signal,the voltage transition of the ramp signal is carried out through capacitor charge redistribution,and at the same time,the capacitor voltage division principle is used to change the slope of the ramp signal,and the two-step quantization is realized and the quantification results are calculated and corrected by the numerical algorithm,and a high-precision two-step single-slope ADC is studied and designed,which improves the conversion speed and conversion accuracy of the column-level ADC.Firstly,a theoretical conversion model of high-precision two-step single-slope ADC is studied,and the effects of fine ramp signal(ramp2)slope error,comparator delay error,and fine ramp signal voltage transition error on the ADC conversion results are studied from the perspective of conversion curve.Then,the Simulink behavior-level simulation model of the high-precision two-step single-slope ADC is built,and the behavior-level simulation is carried out,which guides the actual circuit design:in the actual circuit design,only need to complete the design of the comparator and simulate and measure the comparator delay,and then design a reasonable ramp2 voltage transition,and calculate the error correction amount,and correct it in the result calculation,and at the same time make the ramp2 ramp signal slope have enough change margin.The slope coefficient of the ramp2 ramp signal relative to the basic ramp signal is designed to be 1/7.5.Finally,the circuit design and simulation of high-precision two-step single-slope ADC is completed based on Cadence simulation software using SMIC 0.18μm CMOS process,mainly including chip-level ramp generator,ramp output buffer,column-level ramp generator,comparator and latch.The high-precision two-step single-slope ADC designed in this thesis has a conversion period of 38μs,an input voltage range of 0.4～2.4 V,a resolution accuracy of14 bits,an ENOB of 13.78 bits,and a column-level circuit power of 135μW at an 80MHz clock frequency.Compared with traditional single-slope ADCs,the ADC conversion speed of the design in this thesis is nearly 5 times faster. |
