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Design Of 900MHz Duplexer And Low-noise Amplifier Based On 0.28?m SOI CMOS

Posted on:2019-07-24Degree:MasterType:Thesis
Country:ChinaCandidate:B F ChenFull Text:PDF
GTID:2428330590959923Subject:Engineering
Abstract/Summary:PDF Full Text Request
Duplexer,as an important part of the transceiver system link with the common antenna,works as to ensure that the transmitting and receiving links can work properly at the same time and to isolate the transmitting and receiving signals.Low noise Amplifier(LNA),not only the following circuit module stage connected with the receiving port of the duplexer,but also the first active circuit module stage of the receiving system link,plays a vital role in the whole wireless transceiver system link.In fact,the use of a large number of off-chip components in traditional wireless transceiver systems not only enlarges the occupied area,but also increases the cost.As a result,on-chip integration of the whole system has become a hot research topic in wireless communication technology.Compared with bulk silicon process,SOI CMOS process has many advantages,such as small parasitic parameters,high integration density,and so on.Therefore,the research of duplexer and LNA based on SOI CMOS process has good engineering background and application prospect.The design of the 900 MHz duplexer and LNA based on 0.28?m SOI CMOS process are completed in the work.The duplexer adopts the hybrid transformer structure with electrical balance characteristic,and the working frequency band is 890~960MHz.LNA adopts the balun-LNA structure to realize single-ended input and differential output,and the working frequency band is 0.5~1GHz.Common-gate structure is used to achieve broadband impedance matching at the input.Capacitance cross-coupling technology is used to improve the balance between differential output signals,and noise cancellation technology is used to obtain small circuit noise coefficient.In this thesis,the schematic diagram,pre-simulation results,layout design and post-simulation results of the duplexer and LNA are given respectively.The post-simulation results of duplexer show that,at the TT process and-40~85?,the input loss of TX port is less than-22.5dB,while less than-11.3dB at the ANT port and less than-16.0dB at RX port;TXIL is less than 3.65 dB and RXIL is less than 8.40dB;TX-to-RX isolation is more than 54.9dB.The post-simulation results of LNA show that,at the TT process and 27?,the noise figure is less than4.41 dB,the voltage gain is more than 12.41 dB,the worst matching between input and output loss is-10.62 dB,the absolute amplitude error is less than 0.97 dB,the absolute phase error is less than5.44 degrees;the static working current of core circuit is 14.2 mA,while the input 1dB compression point is about-13.23 dBm at the central frequency 750 MHz.The post-simulation results show that the designed 900 MHz duplexer and LNA have excellent performance and can be widely used in the RF front-end circuit structure of transceiver system link.
Keywords/Search Tags:SOI CMOS, Duplexer, Hybrid transformer, Balun-LNA, On-chip integration
PDF Full Text Request
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