| Information security field has increasingly become the focus of people’s attention.Hardware-implemented cryptographic algorithms are widely used in life,industry and finance.In 2010,China promulgated SM2 algorithm.However,the traditional encryption algorithms based on elliptic curves may have security vulnerabilities in hardware implementation,and attackers can crack the key through side-channel attacks,which poses a huge threat to SM2 algorithm.In order to meet the practical application requirements,this paper adopts hardware implementation of SM2 algorithm with high security performance.Firstly,SM2 algorithm is divided hierarchically,and corresponding design schemes are proposed for different modules.The parallel high-order Montgomery algorithm is proposed to realize modulo multiplication,and the improved modulo multiplication operation only takes about 40 clock cycles.The implementation of almost Montgomery algorithm is proposed for the modulo inverse,which makes full use of the modulo multiplication module to reduce the resource consumption.Point addition and double point operations are implemented with improved atomization algorithms which can effectively resist simple power analysis and reduce the amount of computing by more than 40%.A precomputed NAF random window algorithm is proposed for scalar multiplication operations,which shortens operation time and improves security level,which can effectively resist attacks such as differential power analysis.And the transformation formula method is introduced,which improves algorithm security to a certain extent.Secondly,four verification schemes such as software simulation,on-board verification,arbitrary parameter validation and signature verification algorithm are proposed around functional verification of the optimized SM2 algorithm.Finally,security verification is carried out for the optimized SM2 algorithm.A power collection platform is built and three side-channel attacks,such as Simple Power Analysis,Differential Power Analysis and Gini-impurity Index Attack,are implemented to evaluate the security of the hardware implementation.Comprehensive verification shows that the SM2 algorithm has correct functions and sufficient verification work.The power consumption curve is uniform,and the correlation coefficient of the key hypothesis value is between ±0.05 and the 1-Gini_index value is between 0.145~0.165,which can effectively resist attacks such as simple power analysis.Based on SAKURA-G board,it’s maximum clock frequency is 67.225 MHz,with 13737 registers used and a speed of 385 signatures per second. |