Design And Verification Of Embedded SDRAM Controller

With the rapid development of So C,the CPU's ablility of processing and conputing has been improved.Thus,memories must have great performance in data transmission.SDRAM has been widely used in So C,because it can transfer data in a high speed,which has a large memory capacity and a high integration level.However,the design of SDRAM controller is complicated to achieve.The issue is based on design and verification of an embedded system SDRAM controller,which is connected to PLB bus and DCR bus.Data transmission is achieved by PLB bus and setting registers is achieved by DCR bus.Based on So C verification platform,functional simulation was complished by hardware and software co – verification.Three key pionts have been discussed in this paper.Frist,SDRAM storage principles,transmission principles and timing sequence have been studied.Second,the design of SDRAM controller has been achieved.SDRAM controller is divded into four modules: PLB Slave interface module,DCR interface module,cross-clock domain conversion module and SDRAM control module.SDRAM controlling module is the core of SDRAM controller.Analyzing the difficult points and key technology,determine the way to design and achieve.Third,the functional verification of SDRM controller has been complished.Hardware and software co-verification platform has been built after So C verificationstrategy studied.The performance of the SDRAM controller is as follows:1.The memory bus can be chosen as 32 bit or 64bit;2.ECC check and odd parity check can be chosen;3.Four Pages can be open at the same time;4.Single operation and 4 words burst operation are supported;5.Timing sequence of SDRAM can be programmabled;6.Registers of SDRAM controller can be setted by DCR bus.LRU algorithm has been used to optimize the page model,which improved transmission performance.SDRAM model has been built on the verification platform to guaranteen the correctness of the SDRAM function.Testcases and C language function have been built,and the simulation reports have been saved into log files.In the end of this paper,the simulation waveform is analyzed,testcases must cover very function point.The design and functional simulation of SDRAM controller have been complished.