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Development Of An Ultra-high-definition Video Test Signal Sourc

Posted on:2023-09-04Degree:MasterType:Thesis
Country:ChinaCandidate:J L MaFull Text:PDF
GTID:2568306833963369Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
At present,major display manufacturers,in order to provide consumers with more realistic pictures,are committed to researching and manufacturing ultra-high-definition video signal display equipment.In production testing,enterprises need a video test signal source that can output ultra-high-definition video signals,which is used to test TV motherboards that display ultra-high-definition video signals.However,due to electromagnetic noise,mechanical noise forced to vibrate,etc.in the factory environment where video motherboards are produced,these noises,especially higher frequency electromagnetic noise,can distort the transmitted video signal.In order to reliably detect the quality of UHD video processing motherboards,enterprises need UHD video test signal sources to output UHD video color bar signals stably and continuously.The existing video signal test signal source is realized by multiple microcontrollers or multiple FPGAs,and such a design is not conducive to improving the integration.Especially when the signal source generates the video signal of the HDMI interface,the signal source needs an external special chip SIL9134 or SIL9136 to convert the parallel video signal into a serial differential signal and output it through the HDMI interface.Such a design is also not conducive to cost savings.This paper designs and implements an ultra-high-definition color video signal source based on FPGA,which overcomes the disadvantages of existing signal sources.The system uses the XC7A100 T chip of the ARTIX-7 series as the core processor,and uses the processing unit within the FPGA itself to generate ultra-high-definition RGB three-color signals.Then the RGB signal is converted into a component YUV signal through the color space conversion module.The YUV signal is then input to the data compression module for compression processing.The compressed YUV signal is converted into a serial TMDS signal after being encoded by TMDS and the parallel-to-serial module,and finally the signal is output through the HDMI interface.The signal source implemented in this paper reduces the code transmission rate of the device by compressing the ultra-high-definition video signal,and can output the ultra-high-definition video color bar signal stably,reliably and continuously.At the same time,the signal source uses the internal resources of the FPGA to generate the HDMI interface signal.This design saves the dedicated chip for video signal processing and reduces the cost of the device.In terms of function detection,the signal source uses the IIC communication protocol as the standard,and uses the DDC bus of the HDMI interface to build the communication between the FPGA and the downstream display device.Such a design allows the signal source and the downstream display device to perform interactive communication of data and keys,so as to complete the detection of the HDCP and EDID functions of the downstream device.The design of this paper is based on the verification and debugging of Model Sim and oscilloscope,which can finally display ultra-high-definition video signals on the display device in real time and detect the auxiliary functions of the downstream display device in real time.
Keywords/Search Tags:FPGA, UHD Video Signal, Compression Coding, TMDS
PDF Full Text Request
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