The Study Of Video Compression Technology And The Research Of FPGA Realization

Future time is an information era, information needs media to record, translate and obtain. The image compression and decompression became one of important. So the encoding of video is the key technology of information field.It starts the new era of the application of video communication and storage after the introduction of a series of international standard of video code that ISO and ITU-T established. All the time the goal is a common constant pursuit that achieving the quality of picture as good as possible on the basis of code rate(or memory capacity) as low as possible from the suggestion of H.261 video code to H.262/3/4,MPEG-1/2/4 video code ,etc.The complexity of video coding system mainly lies on the motion estimation algorithm. So how to make the search of motion estimation algorithms robust, faster,and more effective becomes a hot research topic.In embedded real-time system, the cores often are parallel computers, Digital Signal processors (DSP), Application Specific Integrated Circuits (ASIC) and so on. But in latest years, with the development of EDA technology, System on programmable chips (SOPC) has been becoming more and more popular. Field programmable gate arrays (FPGA) are much lower cost, much higher parallel computing speed and much more flexible. Specially, FPGA embrace particular superiority in video and image processing systems.In this paper, the content can be divided into three parts.①Introducing the current major video coding standards。Firstly, this thesis simply discusses the MPEG and H.26X;Secondly, it introduces in detail the principle and the essential technology in H.264/AVC video coding standard.②Presenting an adaptive fast motion estimation algorithm based on block matching. Firstly, it introduces several popularly fast block matching motion estimation algorithms. Secondly, analyzes their advantages and disadvantages by experiments. Thirdly, this paper presents an adaptive fast motion estimation algorithm based on block matching. Taking advantage of statistical distributing characteristic of motion vector to find the original searching central position and determine searching patterns. Experimental result shows that the new algorithm can increase the encoding speed and reduce computation amount significantly with a negligible degradation in quality.③Implementing real-time video capture and display based on FPGA. Firstly, it introduces the software and hardware platforms. Secondly, it discusses key technology and design methodology. Thirdly, designs the system of real-time video capture and display based on the platform of CycloneⅡand gives the experimental result and timing analyses.④Implementing DCT module based on FPGA.Finally, gives the summary of the research and discusses the subsequent research work on the basis of it.