Design Of High Speed Optical Receiver Front-end Circuit Chip In 0.25μm SiGe BiCMOS

The capacity and speed of communication systems are increasing with the continuous development of the Internet,big data and the cloud computing.Traditional electrical transmission systems have gradually lost their abilities to adapt to the development of communication systems due to their large thermal losses during transmission and limited bandwidths.The optical fiber communication system with many advantages such as anti-interference,along with the gradual maturity of op-electronic technology,has become the best communication system to match the increasing requirements for the communication rate and quality.As a key part of optical communication,currently the optical receiver is a research hotspot.A 25Gb/s optical receiver chip has been designed and implemented base in a0.25μm SiGe BiCMOS process.Because the performance of the optical receiver chip determines the quality of the entire optical fiber communication system,its performance requirements are more stringent.The optical receiver designed in this paper consists of a pseudo-differential transimpedance amplifier,a two-stage modified Cherry-Hooper limiting amplifier,an output buffer and a DC offset cancellation circuit module.The pseudo-differential transimpedance amplifier not only converts the weak photocurrent input from the photodetector into a voltage and amplifies it,but also suppresses substrate noise and power supply noise to a certain extent in the form of pseudo-differential.The limiting amplifiers greatly expand the overall bandwidth of the optical receiver as well as amplifying the voltage signal.The output buffer provides a good output matching,witch facilitates the interconnection of the chip and the subsequent circuit.The DC offset due to the change in the input photocurrent will influence the optical receiver and make it not work correctly after multi-stage amplification.Therefor,a DC offset cancellation circuit is added to eliminate the DC offset,thereby ensuring a large dynamic range of the circuit.After testing,the optical receiver has a transimpedance gain of 63.2dBΩ and a bandwidth of 20.7GHz,which is completely suitable for the transmission of 25Gb/s signals.The chip has a sensitivity of-10.3d Bm,an output swing of 360.7m V,and S₂₂,the return loss at the output,is less than-15d B in the entire bandwidth,which means that the chip has good output drive capability.According to the measurement of the eye diagram,it can be seen that the chip’s eye diagram is clear,the“eyes”open wide,the “eyelids”are thin.The chip can transmit data of up to 30.4Gb/s.The chip achieves an excellent performance.