Design Of 25-Gbps Front-End Circuits For Optical Receiver In SiGe BiCMOS

With the uninterrupted progress of communication technology,faster communication channel is increasingly demanded for people.The merits of the whole communication system are determined by transmission bandwidth,transmission loss,anti-interference performance and transmission rate.However,because of limited bandwidth and heat loss caused by heating,transmission data may be damaged by the electric transmission network.Meanwhile,with the maturity of optoelectronic integration,breakthroughs have been made in both discrete components and integrated devices,which make optical fiber communication become one of the best choices for communication systems.While the performance of the entire optical fiber communication system is reflected in the output characteristics of the optical receiver,the research of the front-end circuits of the optical receiver is also a current hot topic on account of its importance for optical receiver.In this paper,front-end circuits for 25Gbps in SiGe BiCMOS optical receiver are designed.Based on 0.18μm SiGe BiCMOS technology,the 25Gbps optical receiver front-end circuits with 2.7V and 3.3V supply voltage is designed in this paper.The performance parameters of the front-end circuit are required to be strict due to the fact that the output signal has a great influence on the subsequent data recovery circuit,mainly including decision circuit and clock recovery module.Post-simulation results of the front-end circuits achieve high transimpedance gain of 68dBΩ,bandwidth of27.3GHz,sensitivity of-16.7dBm,differential output swing of 701.5mV,power consumption of 163mW,and etc.In the meanwhile,the simulation results at different process corners also reach the expectation.At the same time,according to the index requirements,the output return loss S₂₂ is lower than-15dB in the 21.1GHz broadband.The design consists of a transimpedance amplifier,a two-stage limiting amplifier and an output buffer.Considering the possible change of DC level,it's amplified by the later stage so that the whole circuit does not work in the normal area,resulting in signal damage.Therefore,a DC offset cancellation module is added.The transimpedance amplifier converts the photocurrent signal from the photodetector into voltage signal,and adopts pseudo-differential topoly to suppress the noise of power supply and substrate.On the basis of amplifying the preamplifier voltage signal,the limiting amplifier filters out the signals that are too high or too low,so that the circuit will not work abnormally under this signal.The module adopts an improved Cherry-Hooper structure,which adds resistance between the base of the transistor and the collector of another transistor to expand the bandwidth of the circuit and reduce the DC output level.In order to improve the bandwidth and reduce the output return loss,the parallel inductance-peaking technology is used in the output buffer circuit to introduce zeros and compensate the poles.