A Design Of 50 Gbps Ultra-high Speed Transimpedance Amplifier Based On 0.13-?m Sige BiCMOS Technology

With the continuous development of optical communication systems,global data traffic has been growing rapidly.Higher speed and larger capacity data transfer becomes more important.Nowadays,the 100-G high-speed optical communication system has matured,and the 400-G ultra-high-speed optical communication system has brought great challenges to the design of the optical receiver front-end circuit.The transimpedance amplifier circuit acts as the most important role in the optical receiver chip,because its performance has the deterministic impact and a great influence on the optical receiver and post amplifiers.Based on 0.13-?m SiGe BiCMOS technology,a 50-Gb/s ultra-high speed transimpedance amplifier(TIA)circuit has been proposed.The optical receiver front-end circuit chip designed in this subject is divided into a main channel amplification circuit and a bias circuit.The main channel amplification circuit comprises an input stage two-stage pre-amplifier,a variable gain amplifier,a DC offset canceller and an output buffer;the bias circuit comprises a bandgap to provide stable voltage,a power supply circuit for input stage and a current mirror circuit with temperature compensation.The post layout simulation shows that the TIA achieves a transimpedance gain ranging from 50 d B? to 66 d B? and a bandwidth of 41 GHz.It features a low group delay variation of ± 6.5 ps within the double bandwidths(BWs)and has a good eye diagram performance.The equivalent input integrated noise current is 6.3 ?A,and the input overload photocurrent is 3 m A.The chip power consumption is 237 m W at 3.3 V supply voltage.The two-stage pre-amplifier uses an innovative structure to isolate the PD capacitor from the front-end circuit input capacitance through a common-base circuit to improve the gain-bandwidth performance of the front-end circuit.The gain of the input amplifier circuit is increased to reduce the noise of the input stage circuit.With the strategy of post-equalization bandwidth extension,the degeneration capacitance peaking is implemented in the variable gain amplifier circuit to increase the high frequency response,thereby compensating the loss of the first two-stage pre-amplifier's bandwidth.Therefore,the noise and bandwidth performance in the TIA is improved.The bias circuit provides a bandgap reference to provide a stable voltage for the input stage,and temperature compensation techniques are used to ensure the thermal stability of the chip.