MIPS Microprocessor Design For Internet Of Things Applications

In recent years,with the continuous innovation and development of the global integrated circuit industry and the improvement of chip integration,the performance of microprocessors has been significantly improved,and their applications have become more and more extensive.Many industries based on chips are booming,and the Internet of Things is no exception.At present,the Internet of Things has been widely used in smart home,smart medical care,smart transportation,smart manufacturing,smart city and other fields.With the continuous innovation of technology and the rapid development of industry,the application and technology development of the Internet of Things has broad application prospects and great development potential.There are many application scenarios of the Internet of Things,and the demand for microprocessors is relatively large.However,different application scenarios have different requirements for processor performance,which requires different design methods and even different instruction set architectures in the design of processors to meet the requirements of a certain Io T scenario.This special-purpose chip has problems such as long design cycle and poor adaptability.The research work carried out in this paper is as follows:(1)A MIPS(Microcomputer without interlocked pipeline stages)architecture microprocessor with a variable data path is proposed.The processor is based on the RISC(Reduced Instruction Set Computer)processor architecture.In different Io T application scenarios,the IO(Input/Output)interface can be used to select the required data path and frequency to configure the processor to meet different requirements.performance and power requirements.(2)In order to improve the performance of the processor,this paper adopts the pipeline design method.Three-level and five-level pipeline series are designed,and the pipeline series and frequency are controlled by control signals,thereby achieving the effect of controlling the performance and power consumption of the entire microprocessor.In order to reduce the area of the chip,the three-level and five-level data paths multiplex the fetching,decoding and ALU(Arithmetic and logic unit)parts.(3)Start the design from a basic instruction "ori",build a basic data path,and use Verilog HDL(Hardware Description Language)to complete the hardware circuit design.In order to ensure the accuracy of the design,the three-stage and five-stage pipelines are respectively The simulation verification work was carried out.Then,on the basis of the basic data path,gradually add arithmetic instructions,branch and jump instructions,and data operation instructions to improve the microprocessor according to the type of instructions,solve the problems related to the data,structure and control of the pipeline,and complete the process including co-processing The microprocessor design and simulation verification work of 56 instructions including device-related instructions and exception handling instructions,of which the three-level pipeline supports 52 instructions except multiplication and division,and the five-level pipeline supports all 56 instructions.(4)The microprocessor is verified and the application scenarios of different pipeline levels are analyzed.The verification part first uses Synopsys’ DC(Design Compiler)synthesis tool to synthesize under the process library of TSMC(Taiwan Semiconductor Manufacturing Company)’s 12 nm T12FFC process,and obtains that the total area of the microprocessor is about 4336μm ~2,and the highest theoretically achievable frequency It is about 1GHz,and the lowest power consumption at 50 MHz frequency is about 105.43μW,and the power consumption of each frequency of the third level and the fifth level is compared.Then,the FPGA(Field Programmable Gate Array)prototype verification was carried out,and the function of the microprocessor was further verified by building a small SOC(System on Chip)to ensure that the function of the microprocessor was correct.Finally,the Io T application scenarios of microprocessors are analyzed.The results show that the designed microprocessor can meet the needs of multi-scenario applications of the Internet of Things,and has certain advantages in performance and power consumption,which meets the design requirements.