| With the fusion and development of material science and micro-nano integration technology,capacitive sensors play an increasingly important role in pressure sensing,tactile sensing,new temperature and humidity,and biological sensing.Driven by the Internet of Things and big data technology,the measurement and quantification of micro-capacitive sensors for IoT sensing nodes and smart equipment has important research and application value.Aiming at the problems of low quantization accuracy,insufficient ability to suppress parasitic capacitance,and difficulty in adapting to process scaling down in traditional capacitance quantization circuits,this thesis designs and completes a high-precision capacitance quantization circuit.After analyzing the relevant theories of capacitance-to-time conversion circuit and time-to-digital conversion circuit,this thesis completes the system design of a high-precision capacitance quantization circuit that is more suitable for process scaling down.The circuit uses a constant current source to charge the capacitor to be measured,and uses a comparator and a bandgap reference circuit to complete the calibration of the charging threshold,so as to complete the linear conversion of the capacitance to the time signal,and finally complete the quantification of the capacitor to be measured by measuring the charging time of the capacitor.In a single measurement cycle,the purpose of suppressing the parasitic capacitance is achieved by alternately measuring the capacitance to be measured and the parasitic capacitance.In addition,based on the system structure of the proposed capacitance quantization circuit,the design of the corresponding circuit is completed.It mainly includes capacitance-to-time conversion circuit,time-todigital conversion circuit,control and auxiliary logic,etc.In the capacitance-to-time conversion circuit,firstly,a bandgap reference circuit using current mode summation is designed,its output voltage is 980 mV and the temperature coefficient is 2.39ppm/℃.Secondly,the design of the hysteresis comparator with internal positive feedback is completed,and its unilateral hysteresis width is about 20 mV,which enhances the anti-interference ability of the measurement circuit.Finally,a current reference circuit with an output of 1μA is designed,and the gain boost technology is used to increase the low-frequency output impedance of the circuit to about 7GΩ.The design of the time-to-digital conversion circuit adopts a hybrid structure combining a delay chain and a counter.The time quantization accuracy is 1ns and the dynamic range is 65μs.At the same time,the DLL is used to calibrate the delay chain,which reduces the nonlinearity of the conversion circuit.When designing the charge pump inside the DLL,a weak negative feedback structure is used,so that the mismatch between the charge current and the discharge current is less than 1% under different process corners.Finally,the period jitter of the output clock of the DLL is less than 12 ps.Control and auxiliary logic circuits complete the suppression of parasitic capacitance within the scope of digital circuits,and make the system run according to the set sequence.In addition,the range adjustment module in the control circuit can make the system adaptively increase its own span with the increase of parasitic capacitance.The range adjustment span of the system is 1.6~25.6pF to solve the problem that the measurement cannot be completed due to different parasitic capacitances in different application scenarios.The high-precision sensing capacitance quantization circuit designed in this thesis can adaptively suppress parasitic capacitance,and its main body is completed by a comparator and a digital circuit,compared with the traditional quantization circuit that relies on op amps,it has higher process portability.The simulation results show that the quantization accuracy of the capacitance quantization circuit in this thesis can reach 1fF,the tolerable parasitic capacitance variation range is 1~24pF,the single measurement time is 3.2~51.2μs,the overall power consumption of the circuit is 1.92 mW,and the SNDR is 78.92 dB,and the FOM is 13.84 pJ/step. |