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Design Of High Holding Voltage SCR ESD Protection Devices Based On CMOS Process

Posted on:2023-05-21Degree:MasterType:Thesis
Country:ChinaCandidate:X M FanFull Text:PDF
GTID:2558306623993249Subject:Integrated circuit engineering
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Electrostatic discharge(ESD)is one of the most common problems that threaten the reliability of electronic components and integrated circuits(ICs).With the advancement of integrated circuit process,the size of on-chip devices is getting smaller and the integration level is getting higher and higher,and the chips are more and more susceptible to electrostatic discharge.Therefore,it is necessary to study the ESD protection measures to protect the IC from electrostatic damage.Thesis focuses on the device-level low-voltage ESD protection.Firstly,the basic theory of ESD protection is systematically summarized.Then,the physical characteristics and I-V characteristic curves of several ESD protection devices under ESD stress conditions are analyzed in detail.Finally,the structure of Silicon Controlled Rectifier(SCR)and Dual-Direction Silicon Controlled Rectifier(DDSCR)devices is studied in depth,and the corresponding optimization method is proposed to solve the problems of low holding voltage and high triggering voltage in 0.18-μm CMOS process.The innovation results are summarized as follows:(1)Aiming at the problem that the Low Voltage Triggering SCR(LVTSCR)has a low holding voltage,two new device structures are proposed: a new LVTSCR structure(BJT-LVTSCR)with embedded Bipolar Junction Transistor(BJT)and a high holding voltage LVTSCR structure(HHV-LVTSCR).Compared with traditional LVTSCR,both BJT-LVTSCR and HHD-LVTSCR use additional current discharge path(shunt path)to reduce the current flowing through the SCR path and suppress the positive feedback effect,thus improve the holding voltage.The simulation results show that the trigger voltage of BJT-LVTSCR is 6.73 V,and the holding voltage is increased to 4.32 V,which meets the ESD protection requirements of 3.3V power supply.The trigger voltage of HHD-LVTSCR is 7.4V,and the holding voltage is increased to 5.5V,meeting the ESD protection requirements of 5.0V power supply.(2)In view of the problem that Low-Triggering DDSCR(LTDDSCR)with bidirectional protection capability has a low holding voltage,a DDSCR structure embedded in carrier-recombination region and shunt path(ECRS-DDSCR)was proposed.The ECRS-DDSCR structure uses the recombination region to increase the recombination of minority carriers in the base region,which leads to the decrease of the current gain of the parasitic PNP.Meanwhile,the shunt path is used to reduce the current gain of the parasitic NPN.Both suppress the positive feedback effect of SCR,thus improve the holding voltage.The simulation results show that the holding voltage of ECRS-DDSCR increases to 4.54 V,and the trigger voltage decreases to8.12 V,meeting the ESD protection requirements of 3.3V power supply.By optimizing key dimension parameters,the holding voltage of ECRS-DDSCR is further increased to 5.62 V,meeting the ESD protection requirements of 5.0V power supply.
Keywords/Search Tags:Electrostatic discharge(ESD), SCR, DDSCR, High holding voltage
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