Research And Design Of Millimeter-Wave Low Noise Amplifier Chip Based On Silicon-Based Technology

With the rapid development of wireless technology,spectrum resources are becoming more and more tense.So it is an inevitable trend to develop to higher frequency with more abundant resources.If millimeter wave band is used for radar,there is the advantage of high bandwidth;for communication,there are high communication rate and rich spectrum resources.Therefore,millimeter wave band is more and more widely used.At the same time,the silicon-based process has developed rapidly in recent years.While retaining the advantages of high integration and low cost of CMOS process,RF CMOS process has also greatly improved the cut-off frequency and noise performance,which makes it more suitable for millimeter wave circuits.Therefore,the number of millimeter wave band works based on silicon-based process has gradually increased in recent years.The low noise amplifier is mostly the first active module in the receiver,which has the greatest impact on the noise figure.It should not only provide gain,but also reduce the noise as much as possible to avoid reducing the sensitivity of the system.It can be said that the low noise amplifier is one of the most important parts of the receiver.To sum up,the research and design of millimeter wave band low noise amplifier based on silicon-based technology is essential.The arrangement of this thesis is as follows.The introduction part first briefly introduces the research significance and background of the article,then introduces works applying several representative technologies according to the technology used,and summarizes the current development status of low noise amplifier.The second chapter analyzes the passive and active devices used in millimeter wave integrated circuits.Chapter 3 analyzes several key indexes of low noise amplifier,and introduces the basic structure of amplifier and several mainstream technologies applied at present.Chapter 4and Chapter 5 respectively introduce two low noise amplifiers designed during graduate school.The last chapter is the summary and prospect.The first work shown in this thesis is a 60GHz low noise amplifier based on a 65-nm CMOS process design.The amplifier is built in a differential architecture using a two-stage circuit cascade,and the first stage uses a neutralize capacitor common source structure.The innovation of this design is that the output stage of the amplifier adopts the cascode structure with improved capacitor cross coupling gm-boost technology proposed in this thesis,thus not only the gain of the working frequency band is improved,but also the stability is improved,which improves the performance of capacitance cross coupling gm-boost technology.The amplifier has been copied and simulated as follows:The peak gain is 20.46dB,the 3dB bandwidth is 55.8-63.9GHz,S₁₁ and S₂₂ are less than-9dB in the bandwidth,the minimum noise figure NF is 4.67dB,and the power consumption is46.7m W.The second work presented in this thesis is a W-band low noise amplifier with a center frequency of 94GHz.The process used is 65 nm CMOS.The amplifier is built in a differential structure.In order to solve the problem of gain decline in high frequency,it adopts the improved transformer coupled gm-boost technology based on the cascode structure,which greatly improves the low-frequency stability while improving the high frequency gain.The amplifier has been designed and streamed.The final test results are as follows:within the working bandwidth from 90GHz to 100GHz,the maximum S₂₁ is27.8dB,the minimum S₁₁ is-13dB,the minimum S₂₂ is-32dB,and the power consumption is 90m W.The minimum noise figure NF of simulation is 6.76dB.