| Analog-to-Digital Converter(ADC)is the foundation of the mobile smart Internet of Things,which connects the real world and the information world,and is widely used in industrial production control,biological smart medical and other fields.With the further development of the intelligent Internet of Things,ADCs require higher accuracy and lower power consumption.The application of oversampling and noise shaping technology inΣ-ΔADCs reduces the impact of analog device mismatch and improves accuracy.At the same time,the discrete processing greatly reduces analog power consumption.The key toΣ-ΔADC lies in the modulator design.In response to the above,this article designs the modulator in the high-precision and low-powerΣ-ΔADC.The main work and innovations of the thesis include:systematic analysis of sigma-delta modulators of different architectures;using a new 2-2 MASH technology to achieve higher-precision conversion;using chopping technology and adjusting the chopping node to introduce the parasitic mismatch of the node into the chopping path,make the modulator reach higher accuracy;use adaptive bias technology to make the operational amplifier in integrator more stable;use Slew Rate Boost to speed up the response of the modulator and greatly reduce the system power consumption;analyzed the stability of the modulator,considering various non-ideal factors in the modulator,and performing theoretical analysis and modeling simulation.According to the system simulation results,the circuit and layout design of the modulator are completed.Post-simulation verification and layout optimization are performed.This ADC was designed and fabricated in TSMC 180 nm CMOS process,whose core size is 1.16×0.78 mm~2.Pre-layout simulation reveals the SNR was 111.78 d B,the effective number of bits(ENOB)was 18.275,and the power consumption is 26.76m W.Post-layout simulation reveals the SNR was 108.76 d B,the ENOB was 17.77,and the power consumption was 30.66 m W,resulting in Walden and Schreier figures-of-merit of 3.4 p J/Conv and 169.91 d B respectively.The above results basically meet the design requirements. |