The Research Of A 10-bit Pipelined Analog-to-Digital Converter

System-on-chip (SOC) requires the integration of analog circuits and digital circuits on a single chip. It is very critical to design a high performance A/D converter, which is based on standard CMOS technology. With the development of process technology, high integration and low power will be the dominant research area. It also trends to be high speed and high resolution with wide use in wireless communications, imaging process, audio, video technology and industrial control. All of these bring more challenge to IC design especially to analog IC design. As a special interface connected with analog and digital circuits, high performance analog-to-digital converter is much more important in whole system design.This thesis chooses Pipeline ADC as an object to study after analyzing some high speed and high resolution ADC structure nowadays. Beginning with the principle of the Pipeline ADC , the thesis analyzes its function and characteristics, then parts the system into some sub-modules to further research. The design also adopts switched capacitor circuits for their wide use in low power system. This design pays much attention to the optimization of operational amplifier. Based on the OP, we construct high speed and high resolution switched capacitor circuits. The thesis is finished with the main building blocks' design for a 10-bit high speed, low power Pipeline ADC.The whole circuit design is based on standard 0.35um CMOS process with 3.3V power supply. The whole circuit has been simulated with Hspice simulator, the results show that the dc gain of the operational amplifier is 106dB, the gain-bandwidth is 167MHz. Based on the fully differential operational amplifier and the dynamic comparator, the ADC can achieve 10 bits resolution and 10Msamples/s.