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Research On High Performance Microwave Frequency Synthesizer Based On Fractional-N PLL

Posted on:2022-05-09Degree:MasterType:Thesis
Country:ChinaCandidate:Q K JuFull Text:PDF
GTID:2518306740996619Subject:Electronics and Communications Engineering
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Microwave frequency synthesizer plays an important role in modern electronic systems.It determines the overall performance of modern electronic devices greatly.With the rapid development of science and technology,frequency synthesizer has shown broad application prospects in the field of wireless communication,FMCW radar systems,up-down conversion systems,navigation systems,electronic countermeasures,testing and measuring instruments and so on.In order to meet the needs for high performance microwave frequency synthesizers in these fields,an X/Ku band microwave frequency synthesizer with broadband,low spurious,low phase noise,high frequency resolution is presented in this thesis.Its application in Ku/S down conversion system is researched as well.The main research contents of this thesis are as follows:1.The basic theory of frequency synthesis technique based on phase-locked loop is outlined.The basic operation principle and main components of PLL are introduced.The advantages and disadvantages of inter-N PLL and fractional-N PLL are compared.Then the working mechanism of fractional-N PLL is discussed in detail.The contribution of each chip in the fractional-N PLL on the phase noise of PLL output is analyzed based on linearized phase noise model of fractional-N PLL.The following conclusions can be drew: the phase noise of the output signal of fractional-N PLL within the loop bandwidth is mainly determined by the phase noise of the reference signal,the phase detector and the frequency divider,and the phase noise out of the loop bandwidth is mainly determined by the phase noise of VCO.2.According to the requirements of high frequency resolution,low phase noise and low spurious proposed by the design indexes,a detailed design scheme of X/Ku band wideband frequency source is worked out based on fractional-N PLL with Sigma-Delta modulator in this thesis.The PLL outputs a signal of 5.2GHz?7.3GHz and then drives frequency doubler to output a broadband radio frequency signal with the range of 10.4GHz?14.6GHz.Among them,ADI's HMC703 with third-order DSM is chosen as the PLL,and ADI's HMC587 is chosen as the VCO,and Avago's AMMP-6120 is chosen as the frequency doubler.The simulation,optimization and analysis of fractional-N PLL circuit are carried out with the help of ADIsim PLL,a simulation software designed by ADI.The influence of loop bandwidth,phase margin,phase detection frequency and the current of charge pump on the locking time and phase noise of fractional-N PLL is concerned.Then methods of how to improve the phase noise of frequency source are concluded.After optimization,the simulation results of the performance of fractional-N PLL are given.The design of the hardware and software are completed.3.Experiment research on the X/Ku band wideband frequency source is carried out.In the actual debugging process,the approaches of adjusting the actual parameters of the loop filter slightly and setting the charge pump offset current reasonably are adopted to improve the phase noise of the frequency source further.As the measured results show,the phase noise of the frequency source developed in this thesis is lower than-105 d Bc/Hz@10k Hz,-106 d Bc/Hz@100k Hz in the full band of 10.4GHz?14.6GHz.In addition,the frequency resolution of the frequency source is only about 25 Hz,and the near-end spurious suppression is greater than 40 d Bc,and the far-end spurious suppression is greater than 65 d Bc.The frequency hopping time is less than 15 us,and the output power is 14±2d Bm.4.The design and implementation of Ku/S wideband down-conversion module and automatic gain control(AGC)module with large dynamic range are completed.ADI's HMC554 is chosen as the mixer in the Ku/S down-conversion module and the amplitude equalization technology is adopted to solve the problem of wideband amplitude-frequency response.The measured results show that the conversion gain of the down-conversion module is 11.5±0.7d B and the suppression of LO and RF is good.In order to expand the dynamic range of the AGC circuit effectively,the scheme of cascading three-stage voltage variable attenuator and multi-stage gain block with fixed gain is adopted.In addition,logarithmic detector ADL5513 with large dynamic range is selected as the detector.The measured results indicate that within the working bandwidth of1.75GHz?2.25 GHz,the AGC has a sensitivity of-69 d Bm,large dynamic range of 79 d B.Besides,spurious suppression of AGC is greater than 70 d Bc,and harmonic suppression is greater than54 d Bc.Its output power is about 0.5d Bm,and in-band power flatness is better than 1.1d B,and response time is about 1.86 us.5.X/Ku band wideband frequency source,Ku/S down-conversion module and automatic gain control module are cascaded to construct a Ku/S down-conversion testing system,and the experimental research on this system is carried out.In this down-conversion system,the wideband frequency source described in above chapters provides an adjustable local oscillator signal for the system.The center frequency of the RF input of the down-conversion system is 15.6GHz and the bandwidth of it is 500 MHz.The IF output signal is 2GHz±250MHz.The measured results show that the dynamic range of the input power of the Ku/S down-conversion testing system is 65 d B and the output power is about 0.5d Bm due to the effect of AGC.In addition,this system has a good in-band power flatness better than ±1d B and fine harmonic and spurious suppression better than55 d Bc.
Keywords/Search Tags:fractional-N PLL, X/Ku band frequency source, low phase noise, down-conversion system, automatic gain control
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