Research And Design Of High Definition Video Display Control System Based On FPGA

With the rapid growth of the degree of social information,practical applications such as multi-target detection,identity room system and other requirements for highresolution image transmission interface are also expanding.At the same time,with the development of the Display Port interface protocol,which is free of authentication,authorization fee and the use of packet mechanism,the interface gradually shows the advantage over the most popular HDMI interface,and its market share is also gradually increasing.Therefore,in order to solve the deficiency of the domestic chip in supporting the HBR2-level Display Port output interface,this thesis used the hardware development platform with the domestic reverse FPGA chip to realize the output interface supporting the Display Port version 1.2 protocol.Based on the research and analysis of the functional indexes of FPGA platform and existing video interface IP at home and abroad,this thesis evaluated the transmission performance of the hardware development platform,put forward the packet arrangement mode of Display Port main link which supports many common resolutions,and realized the general AUX link initialization function.In order to connect with the HDMI interface which is used more at the present stage,this thesis used DDR3 as the buffer of image data to realize the function of stitching the multichannel HDMI picture into a higher resolution Display Port video stream,and realized the basic image scaling function.Finally,two monitors with different specifications were used for input test,and PC was used as the video output source for the test.The results showed that the FPGAbased HD video display control system designed and implemented in this thesis can normally initialize and display displays of different specifications,and the splicing function and image zoom function are basically normal.