Design And Optimization Of High-Throughput High-Accuracy Area-Efficient And Energy-Efficient Digital Outphasing Modulator

With the rapid development of 5G communications,the application of millimeter wave bands has become more and more widespread.The efficiency improvement technology of millimeter wave power amplifier has also caused more and more extensive research,such as Outphasing technology.A high-throughput,high-accuracy,area-efficient and energy-efficient digital outphasing modulator is proposed for millimeter-wave transmitters.This digital outphasing modulator is entirely based on the fixed-point unrolled and pipelined radix-2 COordinate Rotation Digital Computer(CORDIC)algorithm,which is suitable for outphasing transmitters based on both IQ and phase modulation architectures.The outphasing angle is calculated by a mixture of single-CORDIC and double-CORDIC algorithm,which significantly reduces the critical path delay.Due to architectural advantages of CORDIC,its error performance,sampling rate,power efficiency and area efficiency are improved.According to FPGA implementation measurements,this CORDIC-based architecture enables a 12-bit outphasing modulator to achieve error vector magnitude of 0.062%and peak sampling rate of 0.74 GSample/s.According to post-layout spice-level simulation in 65nm CMOS,a high-throughput version can work at a peak data rate of 1.85 GSample/s at 1V supply.A low-power version reduces area consumption to only 0.088mm~2,consuming 28.1 pJ/Sample at 0.78 GSample/s at 0.8V supply.The proposed high-throughput outphasing modulator with minimized area is expected to further open up an application area of energy-efficient low-cost millimeter-wave transmitters.In order to cooperate with the external signal control of the millimeter wave Outphasing transmitter,a low-power digital control circuit with high-speed serial peripheral interface(SPI)is presented in this paper,which enables fast and flexible configuration of integrated multi-channel phased arrays.The addressable digital control circuit enables amplitude,phase and other control registers configuration.The SPI enables full-duplex,one-to-many and high-speed communication between the master and slaves.In addition,if a transmission error occurs,it will be detected and reported by internal error mechanisms.The proposed circuit has been fabricated and tested in 40nm CMOS.The measurement results show that this digital circuit can stably work at a clock rate of 100 MHz with 0.1 mW power consumption and 0.036 mm~2silicon area overhead.The high-speed and low-power digital circuit is expected to be widely used in the future integrated multi-channel phased array designs.This article has proposed a CORDIC-based digital beamforming design for phase measurement,proving that CORDIC has its benefits of high performance,low power and low cost.