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Design and implementation of a reliable protocol for the Motorola 68HC12 serial peripheral interface

Posted on:2006-06-24Degree:M.A.ScType:Thesis
University:Dalhousie University (Canada)Candidate:Rangarao, Shanthi BhushanFull Text:PDF
GTID:2458390005496619Subject:Engineering
Abstract/Summary:
The objective of this thesis is to design and implement a reliable protocol for the Motorola 68HC12 Serial Peripheral Interface. The thesis presents a functional description of the Serial Peripheral Interface and introduces two Automatic Repeat Request (ARQ) protocols that include stop and wait, and go-back-N protocol. Literature survey of two synchronous protocols that include, IBM's Bisynchronous communications protocol (Bisync) and IBM's Serial Data Link Control (SDLC) are also discussed as a background to the protocol design.; The protocol design involves the description of the state machines on the master and the slave for various cases of I/O between the master and the slave. Error detection by the implementation of the CRC-16 algorithm is also discussed in this thesis. The research demonstrated the establishment of communication between two serial peripheral interfaces, operation of the interrupt service routines and the reliability of the protocol in transferring data between the master and the slave SPI, detection of errors during communication and how the system recovers during errors.*; *This dissertation is a compound document (contains both a paper copy and a CD as part of the dissertation).
Keywords/Search Tags:Serial peripheral, Protocol, Master and the slave
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