A Design Of High Dr Pixel-level Digital Infrared Readout Circuit

Infrared readout circuit is the core module of infrared detection system,which is responsible for collecting and integrating the photocurrent received by the detector array,and converting it into electrical signal,so as to convert the invisible infrared radiation into visible image.In response to the requirements of the third generation infrared readout circuit for high integration and on-chip digitization,a pixel level digital infrared readout circuit with 64×64 array size and50?m pixel center spacing is designed.By integrating ADC(Analog-to-Digital Converter)in the chip,the analog signal path is shortened,the noise interference on analog signal transmission is reduced,and the dynamic range is improved.First of all,in order to increase the maximum charge handling capacity,PFM(Pulse Frequency Modulation)ADC is selected in the pixel unit,and the number of pulse signals generated by the integral capacitor is used to represent the current value.On this basis,second ADC is introduced to represent the residual charge of the first integration process from the time domain.The ADC step size is reduced by two-stage counting method to reduce the quantization noise and improve the dynamic range.In order to realize the pixel level analog-to-digital conversion,a new counting and storage unit is used in the pixel unit to save the layout area.In order to complete the calculation of equivalent pulse count value in the chip,the timing module and ALU are designed.At the same time,the serial control word register group,column buffer circuit and row/column control circuit are designed.The complete timing control from integration to readout is realized,and the final equivalent pulse count value of pixel array is output in sequence.Based on SMIC 0.11?m 3.3V CMOS process,overall layout of the readout circuit is realized by combining manual design with automatic design.The simulation results show that the maximum charge handling capacity of the circuit can reach 1.28G e~-at 77K operating temperature and 100MHz clock frequency.When the detector current is 10n A,the quantization noise is only 180e~-and the dynamic range of the pixel can reach 126.64d B,the effective dynamic range of the final output is 96.32d B,the fastest frame rate is 575Hz,and the power consumption of one frame is 1.8417m W,which meets the design requirements.