Research On Key Technologies Of 9-bit 1GS/s Time Domain ADC Based On Ring Oscillator Multiplexing

As the link between the analog world and the digital world,analog-to-digital converters(ADC)are widely used in software defined radio(SDR),ultra wide band receivers(UWBR),biomedical applications and embedded systems.These systems often need medium or high resolution ADC running faster than GS/s.Compared with the traditional ADC circuit,the time-domain analog-to-digital converter(TADC)breaks through the limitation of dynamic performance and circuit complexity caused by process size reduction.Its performance improves with the progress of process technology,and better meets the design requirements of high speed and high precision.In this paper,a time domain ADC with sampling rate of 1GS/s and precision of 9bit is designed to meet the application requirements of ADC for high-speed communication front-end system.Firstly,this paper analyzes the advantages of time domain ADC in nanoscale process compared with traditional voltage-domain ADC in terms of high speed and low circuit complexity,introduces the research trends at home and abroad,as well as some basic structures of time-domain ADC proposed internationally,and determines the two-step time domain ADC circuit architecture applied in this paper to achieve high speed and high precision performance.Secondly,in this design architecture,a novel voltage time converter(VTC)based on liked-MDAC structure without op amp is proposed.The working principle of VTC is described,the feasibility of the new structure is discussed,and the influence of circuit nonlinearity on its performance is studied.Then,according to the time-digital quantization structure of the ring oscillator,the ring oscillator multiplexing time-digital converter(TDC)is proposed.At the same time,the method of time interpolation is used to improve the time resolution of time-to-digital converter.A new judgment method of thermometer decoding is designed to realize the digital coding with low bit-error-rate.The noise distribution of voltage-to-time converter and time-to-digital converter are discussed respectively,which provides theoretical guidance for subsequent circuit design.Finally,TSMC 65nm technology and Cadence spectre software is used for simulation verification.The voltage-to-time converter completes 1-bit quantization and outputs significant symbol bits in the voltage domain,and the time-to-digital converter completes 8-bit digital output,so that the overall time domain ADC system achieves 9-bit quantization accuracy.When the sampling rate is 1GS/s,the input signal frequency is 50MHz,the swing is 1V,and the power supply voltage is 1.2V,the SFDR of VTC can reach 72.0db,the linearity is good,and the conversion gain is 1.67ps/mv.The results show that the minimum time resolution step of the TDC schematic is 4.24ps and the TDC layout is 6.865p.The layout simulation results of ADC in time domain at Nyquist frequency show that SINAD is 51.0db,SFDR is 63.5db,and ENOB is 8.2bit.The effective area of the layout is 0.22mm~2,the power consumption is 10.5m W,and the FOM value of the circuit is 35.7f J/conv.In conclusion,the time-domain ADC designed in this paper can achieve the expected high speed and high precision.