Design And Research Of RF LDMOS With High Energy Efficiency

As a core device of power semiconductor devices,RF LDMOS has a wide range of applications in many areas such as wireless communications,military products,intelligent household electrical appliance,and new energy vehicles.The demand for RF LDMOS performance improvement is also increasing.At present,the research direction for the RF LDMOS is mainly focused on the design and manufacture of RF LDMOS devices with more superior performance.It is rare to study how to improve the added power efficiency(PAE)of devices.Driven by the development of the global green energy industry and advancement of green development concept,it has become increasingly important to improve the PAE of devices.The lower the PAE of the device,the more energy is wasted.Therefore,it is of great significance to study the PAE of RF LDMOS under call of “Energy conservation,Emission reduction”.Improving the PAE of RF LDMOS is the focus of this thesis.By designing the device structure,the power added efficiency of the device is improved.In order to study the main factors affecting the power added efficiency,the RF LDMOS structure model is established through ADS software in this thesis.This model is used to simulate and analyze the PAE to obtain the design methods and ideas of high energy efficiency RF LDMOS.In the simulation of the internal parameters of the device,it is found that the threshold voltage,parasitic capacitance,breakdown voltage and transconductance of the device have a greater impact on the power-added efficiency of the device.On the basis of the above research on improving PAE,a high energy efficiency RF LDMOS device structure with partial SOI and partial P-type buried layers(PBPL-PSOI-RF LDMOS)is proposed in this thesis.By modulating the electric field on the surface of the drift region,the electric field on the surface of the drift region of the device is distributed more uniformly,so the breakdown voltage of the device can be improved.In addition,the introduction of the P buried layer helps the depletion of the drift region and enables the device to have lower parasitic capacitance,which is beneficial to improve the PAE of the device.The simulation results show that the device has obtained higher breakdown voltage and higher energy efficiency.Through comparison and simulation,it is found that: Compared with PSOI-RF LDMOS,the breakdown voltage of PBPL-PSOI-RF LDMOS increased from 108.5V to131.4V,which is an increase of 21.1%.The power added efficiency of the device proposed in this thesis increased from 51.1% to 64.9%,an increase of 26.9%.In addition,the optimal working condition of PBPL-PSOI-RF LDMOS is also simulated and analyzed in this thesis.The results showed that the PAE reached the maximum 65.7% when the input power was24 d Bm and the working frequency was 0.9GHz.A high energy efficiency RF LDMOS device structure with a partial low doped channel under the gate(PLDC-RF LDMOS)is also proposed in this thesis.The device lowers the threshold voltage by locally low doping the channel under the gate,which helps the device attract more electrons under the gate,so that the output capability of the device has been enhanced.And the breakdown characteristics of the device will not be affected,which is very helpful to improve the PAE of the device.Through comparison and simulation,it is found that the cut-off frequency of PLDC-RF LDMOS is 3.09 GHz,which is 63.4% higher than the 1.89 GHz of conventional RF LDMOS.The PAE of the device proposed in this thesis has increased from 46.9% to 60.8%,an increase of 29.6%.In addition,the optimal operating condition of PLDC-RF LDMOS is also simulated and analyzed in this thesis.The results showed that the PAE reached the maximum 61.8% when the input power was 26 d Bm and the working frequency was 0.6GHz.Two RF LDMOS structures are proposed in this thesis.Compared with the conventional structure,the PAE of the two device structures has been improved,which verifies the correctness of the high energy efficiency design ideas.Through the simulation and analysis of the devices,these two devices have high energy efficiency while maintaining a good performance,having certain application prospects.