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Rf Power Ldmos Devices

Posted on:2008-09-15Degree:MasterType:Thesis
Country:ChinaCandidate:Y M WangFull Text:PDF
GTID:2208360212499759Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
In order to researching and developing devices of needing in the field of radar,correspond,guided navigation and so on,especially solid-state power amplifier devices. So,researching and developing RF power LDMOS devices is very important. The key of designing these devices is low parasitic capacitance,good linear and high RF gain. In this thesis,how to improve RF property of RF power LDMOS devices is investigated.The RF property of LDMOS is mostly affected by input parasitic capacitance and output parasitic capacitance,the effect of parasitism reduces the parameters of device such as efficiency,gain and cut-off frequency,and makes the match of input and output difficult. According as Sichuan province air traffic control radar solid-state components development project request,a general RF power LDMOS structure is designed in paper firstly,its electronic property is simulated,device structure is optimized using MEDICI. In order to improving RF property of RF power LDMOS,device structure is improved,the design of two structures is completed:one is RF power LDMOS with trench drift region structure;the other is a buried n layer partial SOI of RF power LDMOS.1. RF power LDMOS with trench drift region structure is optimized and designed in paper. Based on the frequency characteristic of RF power LDMOS,rectangle trench structure,converse triangle trench structure and triangle trench structure are proposed,the position,depth and width are analyzed. Under the condition of same breakdown voltage and on-resistance,the optimized trench structure is triangle structure,which can decrease the feedback capacitance largely,the feedback capacitance decreases by 24%,the cut-off frequency increases by 15%.2. A novel buried n layer partial SOI of RF power LDMOS is proposed. The output characteristics of the RF power LDMOS are greatly affected by the parasitic capacitance. The depletion width under the buried oxide layer of the proposed structure increased,so the output capacitance decreased. Its drain-substrate capacitance is 39.1% and 26.5% less than that of the normal LDMOS and of the partial SOI LDMOS respectively. At 1dB compression point, its output power and power gain are 62% and 11.6% higher than that of the partial SOI LDMOS respectively,and the power-added efficiency of the proposed structure increases from 34.1% to 37.3%. The breakdown voltage of the proposed structure is 14% more than that of the bulk structure.Finally,Based on the improve structures,some develop structures are optimized and designed in paper:(1) PSON RF power LDMOS:Its drain-substrate capacitance is 70.2% less than that of the normal LDMOS. The breakdown voltage of the proposed structure is 33.8% more than that of the bulk structure. (2) a buried n layer partial SON of RF power LDMOS:Its drain-substrate capacitance is 75.9% less than that of the normal LDMOS. The breakdown voltage of the proposed structure is 33.8% more than that of the bulk structure. (3) partial SOI of RF power LDMOS with sandwich structure:Its drain-substrate capacitance is 46.6% less than that of the normal LDMOS. The breakdown voltage of the proposed structure is the same as that of the bulk structure.The main work of the paper is that how to improve RF property of RF power LDMOS devices is researched,some new device structures are optimized and designed,specific implement program is proposed. The paper does important start work for processing,manufacturing and achieving market value eventually.
Keywords/Search Tags:RF power LDMOS, Trench structure, PSOI(partial SOI), Buried n layer, Parasitic capacitance
PDF Full Text Request
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