Design And Research Of A CAN Bus Enhanced Controller For DSP

With the continuous development of digital signal processing(DSP)technology,it has been widely used in the field of industrial control.The high reliability of data transmission between devices has become an urgent requirement for people.CAN is the controller area network(Controller Area Network,CAN)Abbreviated,it has become one of the most widely used fieldbuses in the current industrial control field by virtue of its unique advantages in the control field.CAN bus supports multiple masters and multiple nodes can send at the same time.It has the advantages of high transmission rate,strong real-time performance,flexible configuration,high reliability,and strong anti-interference ability.It is especially suitable for use in digital components of electronic and industrial control.Communicate between.As an indispensable part of signal processing in the industrial control field.The enhanced CAN(full name)controller is an enhanced controller area network.Compared with the standard CAN controller,the number of mailboxes is increased,and the timeout function and the time identification function are increased.Therefore,its data transmission is more convenient and flexible,and the amount of processing information is greatly increased.This paper designs an enhanced CAN bus controller in a 32-bit fixed-point DSP chip based on the SMIC0.18?m process.The main work of the paper includes:Firstly,Based on the in-depth analysis of the CAN2.0B protocol DSP architecture,the overall design of the enhanced CAN controller is completed,including:main control register logic unit,mailbox storage logic unit,receiving control(receiving filter)logic unit,timing Management logic unit,bit stream processing module,bit sequential logic unit.Secondly,Completed the optimization design of key circuits such as the bit sequence logic unit and bit stream processing module,and analyzed the various frame types,structures,data stream processing methods and time synchronization issues of the CAN2.0B protocol,and then adopted the digital chip from the top The lower-level modules that will be divided are used to complete the RTL-level design of the enhanced CAN controller using Verilog HDL language,and complete the functional simulation and waveform analysis based on Synopsys VCS.Thirdly,Completed the construction of the system simulation platform,and carried the designed enhanced CAN controller into the DSP system for system-level verification and analysis.The 180nm process based on SMIC has completed circuit synthesis,layout design and simulation verification.The results show that the power consumption is 49.4466mW and the area is 651780.538581um2.The timing report also shows that the design has no timing violations and meets the design requirements.In summary,the paper has completed the circuit design,layout design and simulation verification of a CAN bus enhanced controller for DSP.The power consumption,performance,and timing of the designed enhanced CAN controller reach the CAN2.0B protocol.It is required that in addition to being used in DSP,it can also be directly used as a peripheral directly in the system-on-chip.It can also be combined with AMBA bus related AHB and APB to complete more comprehensive chip functions,and it can also be mounted on MCU and FPGA.The results of the thesis have engineering reference value for the system-level application design of enhanced CAN control.