Design Of ZQ Calibration Circuit Based On LPDDR4 SDRAM

The synchronous dynamic random access memory(SDRAM)has resulted in a series of multifunctional,high-speed memories.The Double-Data-Rate Synchronous Dynamic Random Access Memory(DDR SDRAM)has greatly increased the data transmission rate,but on the premise of increasing the rate,the requirements for reducing power consumption are also higher.Low Power Double-Data-Rate Synchronous Dynamic Random Access Memory(LPDDR SDRAM)is a kind of memory produced with the development of DDR SDRAM.LPDDR is widely used in mobile electronic devices and electronic products because of its small size and low power consumption.In the current LPDDR SDRAM memory technology,the size and matching of the resistance of the pull down and pull up of the memory output end affects the integrity of the signal,in order to improve the integrity of the transmission signal and enhance the strength of the output signal,the terminal resistor and output driver are introduced in the LPDDR memory.In order to maintain the above characteristics under the influence of manufacturing process,supply voltage and operating temperature(PVT),a calibration circuit is required to calibrate these terminal resistors and output drivers.ZQ calibration technology is usually used to adjust the pull-up and pull-down of the output terminal.Therefore,the LPDDR4 SDRAM chip with ZQ calibration circuit plays an important role in improving signal integrity.In the context of a LPDDR4 chip with a memory frequency of 2133 MHz and a working voltage of 1.1V,the basic principles of the relevant modules in the ZQ calibration circuit are understood and analyzed by this paper,and the ZQ calibration circuit based on LPDDR4 SDRAM is designed.First of all,according to the LPDDR4 technical specifications,the ZQ calibration circuit is built in the functional framework,and the circuit working principle of the ZQ calibration related modules is deeply analyzed.Secondly,based on the Cadence software platform,a semi-custom method is used to design the ZQ calibration control module and a full custom design method to design an analog ZQ calibration circuit.The circuit design is carried out for the two situations where the output voltage VOH in the LPDDR4 system is VDDQ/3 and VDDQ/2.5 respectively,and the Start command is received from the calibration control module,and the output voltage is adjusted by the pull-up and pull-down through the analog calibration module.Then,according to the designed ZQ calibration circuit,the circuit simulation results are analyzed.According to the output voltage VOH being VDDQ/3 and VDDQ/2.5,the output voltage is calibrated and the size of the output voltage and the reference voltage is compared,and the simulation result is obtained.Finally,based on the Virtuoso software platform,the ZQ calibration circuit simulation layout based on LPDDR4 was designed using a fully customized method,and the layout and wiring were performed to complete the ZQ calibration simulation circuit layout.The circuit design simulation result analysis shows: When VOH=VDDQ/3,the output standard voltage is 367 m V,and the pull-up and pull-down calibration codes are <0 1 1 1 1 1> and <1 0 1 1 1 1>,the voltage after calibration is 354.5m V and 353.4m V respectively;When VOH=VDDQ/2.5,the output standard voltage is 440 m V,at this time the pull-up and pull-down calibration codes are <01 0 0 0 0> and <0 1 0 1 0 0>,the voltage after calibration is 452.8m V and 451.3m V.According to the calibration results,the difference between the calibrated output voltage and the expected voltage does not exceed ±5%,and the ZQ calibration circuit realizes accurate and high-precision calibration.