A Low Power Continuous Time Quadrature Bandpass Delta-Sigma ADC Design For Bluetooth

In recent years,the ever-increasing demand for portable mobile communication electronics has promoted the continuous development of Bluetooth technology.The demand for wireless audio(such as TWS headsets),location services,Bluetooth networking,and data transmission continues to increase shipments of Bluetooth devices.Global integrated circuit design companies are also paying more and more attention to Bluetooth technology.At the same time,the ever-increasing application scenarios put forward high-performance,low-power and low-cost requirements for Bluetooth systems.In the receiver design of Bluetooth,more stringent requirements are put forward for the analog-to-digital converter(ADC).In order to gain an advantage in the fierce market competition,the structure of the ADC must be further optimized,and a low-power and low-cost solution that meets the performance requirements at the same time is proposed.For short-range wireless systems,orthogonal continuous time Delta-Sigma modulator has been widely used in the front end of various integrated wireless receivers due to its advantages of high resolution,high bandwidth,anti-aliasing filtering capability and low power consumption.This thesis designs a second-order,four-bit continuous-time quadrature bandpass(CTQBP)Delta-Sigma modulator with a quadrature mismatch shaping algorithm for Bluetooth low-IF receivers.The thesis first introduces the theoretical basis and working principle of Delta-Sigma modulators,analyzes the system structure of most Delta-Sigma modulators,and compares the advantages and disadvantages of discrete-time and continuous-time modulators.And according to the design goal(CTQBP)Delta-Sigma ADC is systematically designed.The modulator adopts the structure of CIFB;the integrator is realized by an active RC integrator;the feedback digital-to-analog converter(DAC)adopts a current steering DAC;the quantizer adopts a 4bits SAR ADC.The use of these structures and circuits can reduce the power consumption of the modulator under the conditions of meeting wireless applications.Compared with the traditional low-pass delta-sigma modulator,the effective over-sampling rate and in-band SNR are improved by using the design of orthogonal bandpass filter to shift the signal bandwidth to the intermediate frequency.Continuous-time quadrature band-pass Delta-Sigma modulators are susceptible to the mismatch between the two quadrature(I/Q)channels,which will significantly reduce the signal-to-noise and distortion ratio(SNDR)and image rejection ratio(IRR)of the signal.).This thesis proposes an orthogonal mismatch shaping algorithm to alleviate the impact of the mismatch between multi-bit(I/Q)DAC units,thereby improving IRR.Under the condition of adding the DAC mismatch with the standard deviation of 2%,adding the orthogonal mismatch shaping algorithm,the SNDR increases by 12.8d B,the effective number of bits increases by 2.12bits,and the mirror image caused by the(I/Q)two-way DAC mismatch is eliminated.signal.This thesis designs(CTQBP)Delta-Sigma ADC and quadrature shaping mismatch algorithm circuit based on TSMC22nm process,and conducts simulation verification.When the power supply voltage is 1.1V,the clock frequency is 96MHz,the oversampling rate is 48 times,the input amplitude is 550m V,and the bandwidth is 1MHz,the SNDR of the former simulation is 84d B,the SNDR of the latter simulation is 78.6 d B,ENOB reaches 12.76 bits,The overall power consumption is only 1.296m W.After optimizing the layout of the layout,the layout area is 0.06mm~2.