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The Design And Research Of Highperformance Sigma-Delta Modulator

Posted on:2016-11-13Degree:MasterType:Thesis
Country:ChinaCandidate:Z D RenFull Text:PDF
GTID:2308330503950471Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
Sigma-delta ADC(Analog to Digital Converter) consists of sigma delta modulator and digital decimation filter. It dwarfs other ADC for its relatively high conversion accuracy and low power dissipation. Sigma-delta modulator is widely used in the audial signal processing for its insensibility to the non-ideal factors and its requirement for lower index of the analog circuits. The accuracy of the whole Sigma Delta ADC depends on the performance of the Sigma-delta modulator. The thesis is to achieve a Sigma-delta modulator featuring more than 15 bit high resolution and less than 10 mw power dissipation.At the outset, the thesis elaborates on the general picture of the Sigma Delta ADC, focusing on the basic principle of the Sigma-delta modulator. The basic structure of the modulator is then set at the requirement of the design indexes. To achieve the anticipated target, the structure of third-order single loop quantization using 128 oversampling rate is adopted. Simulink in the matlab helps in the modeling,analyzing the impacts of different non-ideal factors, such as the clock jitter, the Opamp thermal noise, the Op-amp finite gain, bandwidth and Slew Rate(SR), etc. The auxiliary functions in the sdtoolbox helps get the Parameter Values needed in the following circuit design, such as the integral capacitance, the Op-amp gain in the integrator, bandwidth and Slew Rate(SR), etc., providing reliable foundation for the subsequent circuit design.The main circuit design covers the non-overlapping clock circuit, Switched capacitor integrator, the comparator and bandgap circuits. The thesis gives detailed information about the circuit structure and the simulation results and summarizes how to optimize the Sigma-delta modulator.Under the supply voltage of 3.3V, the modulator is designed and simulated with the application of the TSMC 0.18μm standard process. The result of the time domain simulation of the modulator, as shown in the Spectre in the Cadence, is in line with that of the behavioral level modeling.At the end, the thesis gives the design layout of the Sigma-delta modulator including the rules, procedures and notes of the designing process. The extraction of the parasitic parameter and post-simulation helps prove again the sound performance of the modulator.The frequency domain analysis in the matlab of the time domain out of Spectre shows that, SNR stands at 93.9 dB; about 15.31 bits resolution; the power dissipation, only 8.7mw and the whole layout area is 740μm*1050μm, achieving the anticipated design objective.
Keywords/Search Tags:Sigma-delta Modulator, Accuracy, Power Dissipation, Oversampling Technique, Noise Shaping Technique
PDF Full Text Request
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