Ultra-low Power 10 Bit Delta-Sigma Modulator Design

This paper discusses ultra-low power consumption 10bit second order 1-bit quantization loop Delta-sigma AD (analog-to-digital) modulator. The power consumption is controlled in 150uW.Firstly, the working principle of Delta-sigma AD modulator in time domain is illuminated in this paper, then the transfer function in frequency domain is analsized, the frequency domain mode is set up, the modeling simulation is carried out by using Simulink tool.Secondly, the circuit structure, second order 1-bit quantization loop, is selected in this paper, the ultra-low power plan is presented, the components, operational amplifier, integrator, voltage comparator, reference and latch circuits, are designed and simulated.Finally, the system-level circuit is proposed and simulated, the simulation results demonstrate that this low consumption can achieve 10bit accuracy, more than 80dB SNR, more than 90dB spurious free dynamic range performance. At the same time, the power consumption is only 139uW.