The Design Of Low Power Audio Sigma-Delta Modulator

With the rapid development of integrated deep sub-micron technology,audio Sigma-Delta ADC has a wide range of applications in portable multimedia players and handheld audio devices.The low-power implementation of the high-precision Sigma-Delta modulator has become the key to limiting the performance of the ADC.This paper focuses on the high-precision and low-power design of Sigma-Delta Modulator,and completes a prototype circuit design of Sigma-Delta Modulator.This paper first shows situation of Sigma-Delta ADC at home and aboard.Then,the basic principles of Sigma-Delta ADC and development are introduced.At last,characteristics of various structures are compared.According to the design requirements of the project,using the Matlab Simulink tool to conduct behavioral level modeling of the modulator structure,the third-order feed-forward single-loop quantized Sigma-Delta modulator structure are determined.In this structure,a low-power design is performed for the most critical first-stage integrator module in the modulator:the core amplifier in the integrator employs the most power-efficient dynamic telescopic cascode structure,The dynamic amplifier technology can reduce the power consumption of the amplifier by 25%.At the same time,it uses a switched-capacitor common-mode feedback circuit to reduce power consumption and stabilize the output common-mode voltage.The latter two stage integrators use the same structure as the first stage integrator directly,but reducing the ratio of MOS width to reduce the current consumption.Capacitors and adder are used to sum feed-forward circuits,and dynamic latch comparator used to implement single-bit quantization.This paper designs the schematic diagram of the Sigma-Delta modulator circuit based on the SMIC 0.18?m COMS process and completes the layout design.The total area is 0.042mm~2.The post-simulation result of the Sigma-Delta modulator shows,under the condition that the power supply voltage is 1.8V,oversampling ratio is 256,sampling frequency is 12.288MHz,input signal frequency is 12.5KHz,and the amplitude is 400mV.The effect number of bits reaches 16.28bit,signal noise ratio is99.8dB,and the current consumption is 0.83mA,which satisfies the design requirements.