| This topic is derived from the development of an airborne radar servo control system.In this thesis,the hardware system development of the airborne radar servo control system was completed and the FPGA interface was developmented.In addition,the factors affecting the decoupling capability of the power system were analyzed and simulated.Firstly,the overall scheme of the airborne radar servo control system based on DSP+ FPGA was designed.Besides,the models of motor,driver and encoder were identified.The power dissipation was calculated and the design scheme of the FPGA interface was presented.Secondly,the power integrity problems were analyzed.The board-level power distribution network was mainly analyzed and simulated by using the target impedance analysis method.In addition,the method of selecting the decoupling capacitor network was proposed,the layout and installation of the decoupling capacitor were optimized,and a series of improvement measures for division and setting of the power plane were proposed.Thirdly,the circuit design and PCB design of the control system were completed.On the basis of dividing the control circuit according to the function,the circuit design of the control board was completed.In addition,the PCB design of the control board was completed according to the measures to improve the power integrity.Fourthly,the FPGA interface was designed.The FPGA control timing for peripheral devices was designed by using the state machine and edge detection technology.And the correctness of the interface development was verified by using the simulation function of the development platform.Finally,the joint test and debugging of the hardware system were completed.The single board debugging of the control board and the joint test of the airborne radar servo control system were completed.The functions of preset,circle sweep and fan sweep were realized,and the main performance indexes such as positioning accuracy and speed error were tested. |
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