Research On System-level Verification Strategy Of 12-bit Analog-to-digital Converter Based On UVM

As integrated circuits enter the post-Moore era,the functions of chips are becoming more and more complex,which placed higher requirements on the quality of verification work.During the internship,the author discovered that the traditional System Verilog verification environment has the following drawbacks: 1.There are too many global variables which make people easy to influence each other when they are using this platform;2.Various configuration or inspection codes are piled up in the top layer or one module,which has poor readability and isolation;3.Low reusability leads to too many places for next chip to modify.Therefore,the author decided to build a new verification platform to solve the above problems.The UVM verification methodology with high reusability and modularity just meets this demand.The UVM verification methodology has a higher level of abstraction.Each module component is realized by calling its internal resource library when the component is used,and there is no need to define the underlying module content,which greatly reduces the amount of verification code.Since the verification platform is a coordinated operation of various modules,only a small amount of changes are often required when the code needs to be modified,which is conducive to improving the efficiency of verification.The UVM methodology defines a wealth of mechanisms.In the process of operation,the flexible application of different mechanisms can make the verification process more simplified and efficient.After introducing the relevant knowledge of the analog-to-digital conversion path,this paper proposes the verification mechanism and verification platform construction plan,and decomposes the function points for the realization of subsequent test cases and coverage points.After analyzing the protocol,interface and configuration involved in the chip,the internal functions of each component are assigned and implemented step by step,and finally a verification platform that meets expectations is built.Based on the above verification platform,system-level functional verification of its internal 12-bit analog-to-digital conversion path is carried out.The verification mainly to research the conversion accuracy,conversion rate,over-limit alarm and conversion trigger mode of the analog-to-digital converter in different modes.In the LINUX environment,NC-SIM is used to simulate different excitations,and the chip behavior reflected by its waveform information is analyzed.Afterwards,the coverage rate was collected.The code coverage rate reached 95%.The function coverage rate and assertion coverage rate reached 100%,which ensured the successful tapeout of the chip.It is proved that this platform not only supports system-level verification on analog-to-digital conversion,but also has superiority over traditional verification platforms by the architecture logic,operating mechanism and data results.