Design And Verification Of Nand Controller Based On UVM

In recent years,with the continuous development of information technology,the electronic market has put forward higher requirements for the information storage capabilities of mobile devices.Nand flash,as a low-capacity,low-power consumption and high-speed access memory,greatly caters to market demand and has become a mainstream largecapacity data memory.More and more chip design companies integrate Nand flash controllers into So Cs.At the same time,the cost of chip design is high,and the loss caused by re-taping is unbearable.It is necessary to find design defects and errors through verification.Therefore,the completeness of chip verification is very important.UVM is currently the most popular and most complete verification methodology.This subject designs and verifies the Nand controller based on UVM.The Nand flash and PC Card controllers designed in this article are used in STM32F4 series MCUs.The paper designs the related modules of the controller,including: AHB interface module,register configuration module,FIFO control module,Nand flash controller module and PC Card controller module.The AHB interface module is used to convert the AHB interface into a controller interface for internal use.The FIFO control module is used to store the data written by AHB burst.The register configuration module mainly completes the latching of the register configuration issued by AHB,and sends the register configuration to the corresponding control module.The Nand flash controller module is used to control the read and write timing in bank2 and bank3 spaces.The PC Card controller module is used to control the read and write timing in the bank4 space.Depending on the address space where the controller is located,a series of operations such as reading and writing to the controller directly reduces the time required for software to simulate external devices and greatly improves work efficiency.Through detailed analysis of the design of the two controllers,Nand flash and PC Card,the verification plan is written and the verification scheme is made.The overall verification plan of the paper includes: extracting 43 verification function points,generating 32 test cases that closely combine base?sequence with task,and constructing 24 coverage points for collecting coverage.Through the simulation test on the VCS,the data of the reference model is compared with the data of the monitor,and the simulation result is judged.Use Verdi to review the waveforms of the test cases that failed,analyze and modify the code at the same time,and iterate until all the test cases are determined to be successful.This project finally summarized all simulation results,reaching a coverage rate of 100%.This subject completed the design of Nand flash and PC Card controllers,and passed a complete verification process to ensure the correct functions of the two controllers.The clock frequency of this design is 100 MHz,and the use of this controller effectively improves the transmission speed between Nand flash and external devices.This subject builds a verification platform for Nand flash and PC Card.The verification platform is fully functional and can be directly integrated into the subsequent chip verification platform.