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Design And Implementation Of DAM-FTL Algorithm For NAND Flash

Posted on:2019-09-22Degree:MasterType:Thesis
Country:ChinaCandidate:Z H YinFull Text:PDF
GTID:2428330563986014Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
NAND Flash memory is developing rapidly,especially in solid state hard disk.With the improvement of materials and processes,the capacity of NAND Flash is increasing.This paper focuses on large capacity NAND Flash,and makes in-depth research on the operation characteristics of NAND Flash and the algorithm of flash transfer layer(FTL).By analyzing the current FTL algorithm and YAFFS2 file system,this paper proposes DAM-FTL algorithm,and introduces the bad block management,address mapping and garbage collection module in detail.The proposed DAM-FTL bad block management algorithm,according to the different causes of NAND Flash bad block,design of static and dynamic bad block table,at the same time,the bad block is placed at the end of the address mapping table,found a bad block,the method of decreasing the corresponding address pointer to the address mapping bad block area.The DAM-FTL bad block management algorithm effectively prolongs the service life of NAND Flash.This paper analyzes the YAFFS2 file system,combines the file size and distribution characteristics,proposes the DAM-FTL address mapping algorithm.The algorithm introduces the concept of mapping segment to effectively reduce the address mapping table to occupy the RAM space and improve the write operation efficiency.Aiming at the shortcomings of the current garbage collection algorithm,a DAM-FTL garbage collection algorithm is proposed to estimate the number of recycling in advance,and the integrated garbage collection overhead is more specific than the specific garbage collection strategy.At the same time,the selection method of target blocks to be recycled in the garbage collection algorithm has also been improved.In addition,in the current FTL algorithm design,due to the lack of error detection mechanism,the current existing algorithm verification platform test results and actual results of a larger gap.This paper presents an FTL algorithm verification platform,which simulates the operating characteristics of NAND Flash,increases the error detection mechanism,simulates the real operating environment,and completes the verification of the FTL algorithm.Finally,the FTL algorithm is run on the software platform and the real flash memory device to complete the simulation experiment.The experiment shows that the error range of the two is within 7%.The FTL algorithm verification platform proposed in this paper provides a convenient tool for the development of FTL algorithms.It also shortens the algorithm development cycle,and reduces research and development costs.Finally,the simulation of the DAM-FTL algorithm is completed by the FlashSim and the NAND Flash-based FTL algorithm verification platform presented in this paper.The experimental results show that the DAM-FTL algorithm improves the write efficiency and garbage collection efficiency compared to other FTL algorithms.
Keywords/Search Tags:NAND Flash, FTL, Bad Block Management, Address Mapping, Garbage Collection, Algorithm Verification Platform
PDF Full Text Request
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