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The Design Of Array Signal Real-time Processing System Based On Distributed Hardware Platform

Posted on:2022-08-02Degree:MasterType:Thesis
Country:ChinaCandidate:C ZhouFull Text:PDF
GTID:2518306572981709Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of modern electronic science and technology,radar target detection and other array signal processing fields have increasingly higher requirements for the real-time computing performance of the hardware platform.This topic has designed a multi-CPU+multi-FPGA distributed hardware platform.The main work of the array signal real-time processing system is as follows:(1)This paper studies multiple hardware combination architectures such as CPU+DSP,DSP+FPGA,and CPU+FPGA,and selects a multi-CPU+multi-FPGA distributed hardware platform according to the signal real-time processing requirements.On this distributed hardware platform,various modular functional designs such as signal sampling,clock and synchronization,main control and storage,signal processing and radio frequency are designed to enable real-time parallel processing capabilities and support complex array signal processing.(2)The array signal real-time processing system design is based on the distributed hardware platform,which meets the array signal processing requirements such as real-time power spectrum calculation,array calibration,channelization,DOA estimation,beamforming,range Doppler map,etc.Then,based on multiple FPGA boards and coprocessors,the array signal processing function module is designed,and multitask management is arranged on the main controller.Finally,the problem of data framing transmission and multi-board synchronization consistency on the distributed hardware platform is studied to ensure the reliability of real-time processing of array signals on the distributed hardware platform.(3)Proposed an array amplitude and phase error calibration scheme based on a distributed hardware platform,and theoretically deduced the calculation formula of the steepest descent method,and finally completed the implementation of the array calibration based on the adaptive filter.In order to suppress strong interference in actual application scenarios,this paper also proposes an improved array calibration implementation method,and simulates and analyzes its anti-interference performance.In the actual measurement scenario,the channel amplitude-frequency curve and phase-frequency curve may have glitches.Three smoothing schemes,interpolation,tracking filtering and FIR filtering,are studied to solve this problem.(4)During the realization of the array signal real-time processing system of the distributed hardware platform,the multi-frequency parallel channelization and distance Doppler graph calculation modules were studied and realized.On the one hand,for the multi-frequency parallel channelization process,the effects of different fixed-point implementations of FPGA on the accuracy of channelized data,spurious components and dynamic range are studied.On the other hand,according to the analysis of the actual array antenna reception,the signal strength difference between the direct wave and the scattered wave in different directions is large.An adaptive intercept method that can adapt to signals of different sizes is studied to ensure the distance on the FPGA.Doppler map calculation will not cause a large loss of accuracy.
Keywords/Search Tags:Distributed hardware architecture, Array calibration, Array signal real-time processing, FPGA
PDF Full Text Request
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