Design Of WLAN Radio Frequency Front-end Circuit Based On 0.18 μm CMOS Process

With the rapid development of wireless communication technology and the continuous expansion of the communication industry,the market demand for all kinds of communication equipment is increasing.As an important part of communication system,wireless local area network is widely used in various communication scenarios because of its high data rate,flexibility,mobility and low cost.As a key part of realizing wireless local area network communication,RF front-end chips have become a hot spot in the industry.This paper mainly studies the design of RF transceiver front-end circuit used in wireless local area network communication.The main performance specifications and performance improvement technologies of RF power amplifier and low noise amplifier are analyzed and discussed.Based on0.18μm CMOS process,a RF transceiver front-end circuit operating at 5.25 GHz is designed.It is composed of RF power amplifier,low noise amplifier and RF transceiver switch,which can realize the conversion between receiving mode and transmitting mode.The RF power amplifier is composed of a single-ended two-stage cascode structure,in which the input stage uses inductance peaking technology to improve the gain to drive the output stage,and a resonant network is added between stages to suppress harmonics.The low noise amplifier adopts a cascode structure with inductive degeneration,and its gain,noise and input matching performance are analyzed and optimized.In the design process,the impedance characteristics of the RF transceiver switch are studied,and on this basis,the impedance matching of the low noise amplifier and the power amplifier at the antenna end is analyzed and designed.In addition,the CMOS Triple-Well process is used to suppress noise and crosstalk,and the AC suspension technology is used to improve the substrate impedance and reduce the power loss of CMOS substrate.Through the post-simulation of the whole RF transceiver front-end circuit,the results show that the designed RF transceiver front-end circuit has a the maximum output power of 18.5 d Bm,a output1 d B compression point of 16.7 d Bm and a maximum power additional efficiency PAE of 22%in the transmit mode.In the receive mode,it provides a noise figure of less than 3.25 d B with the power gain S₂₁ of 12 d B.The input matching S₁₁are less than-10 d B and the input third-order intercept point IIP3 is more than-6 d B.The designed RF transceiver front-end circuit meets the performance requirements of wireless local area network applications.