Research And Design Of Bus Controller Based On FPGA And CAN Protocol 2.0 B

CAN bus is the basic technology of the overall level of automation system,which has a great influence on the development of science and technology and national economy.With the development of CAN bus and increasingly mature related agreements,CAN bus controller developed by foreign research institutions and chip manufacturers has come out one after another.Corresponding research and design work in China has only been carried out in recent years.At present,the domestic research on CAN bus controller chip is still in the initial stage,through its core technology,the foreign technology innovation and improvement,to promote the existing chip technology and CAN bus communication in China,and is of important theoretical and practical significance to get rid of chip import dependence.This paper studies and designs the core controller of CAN bus.First,CAN bus protocol 2.0B,introduces CAN bus communication mode from the data link layer and physical layer,and describes the CAN bus message format and category specified in the protocol.To mark the foreign classic product SJA1000 chip,summarize the function overview of the CAN bus controller,and divide the CAN bus controller into reset module,data flow management module,register management module,physical interface module and bit timing processing module.After module division,we can complete the RTL-level circuit description with Verilog HDL code and realize the CAN bus controller design.The waveform simulation verification is used to complete the simulation results meet the logic requirements of the controller.Through the single module verification,the utility of the controller cannot be guaranteed on this basis.This paper uses FPGA(Field Program Gate Array)to build the hardware verification platform,conduct layout wiring and static timing analysis on the design,and realizes the overall circuit verification and point-to-point monitoring test of PC-end CAN bus controller in real time.The test results meet the communication requirements of CAN bus 2.0B protocol.