Based On The The Ehci Agreement Otg Usb 2.0 Fpga Design And Realization

The Universal Serial Bus(USB) is an external connection standard of computer peripheral equipment and it's an external serial communication interface standard of computer. It has been one of the absolutely necessarily interfaces of modern computers, because of its Plug-and-Play, high reliability in data transmission, facility in expansion and lower cost. USB OTG specification developed a method to communicate between two USB devices without PC, which is impossible before. It takes USB into the embedded field.OTG controller module is the kernel one of the whole system. It realizes role change of embedded USB device between host and device through the Host Negotiation Protocol and the Session Request Protocol.High speed host controller module is an importand module as the system is working as a host. And the host is the kernel part of USB, it responses to manage all the information of USB, actively transfer data.This dissertation first discusses the whole frame of OTG USB2.0 IP, discusses the division of software and hardware, and discusses the storage and data transfer methods.This dissertation reseachs the OTG specification, and does the division work for the OTG controller, then realized RTL design and verification.Then, this dissertation reseaches EHCI protocol and Philip IPS1761 chip, integrate our unique connection method between IP and MCU, then, designs out one more terse data schedule method for our IP. And also it finishes the SW/HW distribution and the RTL design and verification.This IP uses Synopsys VIP to do verification and uses Altera FPGA as the utimately implementation. The end of this paper brings forth the system verification and test environment, and also the result.This dissertation base on "OTG USB2.0 IP core design task" . It has important project value.