Design Of High-performance STT-MRAM Peripheral Circuits

With the development of technology,the traditional memory is facing the challenge of physical limit.Under this background,the research and development of new memory emerge at the historic moment.The spin transfer moment magnetic random memory is considered to be one of the most promising new generation memory.At first,this paper introduces the background and development of magnetic random memory,analyzes its advantages and disadvantages,and on the basis of analyzing the device characteristics of magnetic random memory,the critical point of its overturning voltage and overturning current is calculated.And this is used as the basis of dynamic model construction,and Verilog-A is used for modeling.A reference model suitable for circuit level simulation is set up.At the same time,based on the research of the excellent work,the different reading circuit theory and simulation analysis,using the charge domain design method,the design of no DC channel sensitive amplifier,effectively achieve low power reading.At the same time,the array embedded reference element and the hybrid resistance reference element are proposed in the array design,which can effectively reduce the parasitic deviation between the reference element and the memory element,increase the reading margin and improve the reading accuracy.At the same time,a target index suitable for the last level of cache is established by comparing each index of random access memory under the same process.Finally,TSMC16 nm Fin FET process was used to simulate and verify in Cadence tool.In terms of power consumption,the low power reading of 36.232 FJ /bit is achieved without considering the parasitism of bit line.In terms of speed,the reading cycle of 6ns is designed,which is less than the reading speed of 6ns.In terms of yield,the correct yield of all200 points in the Monte simulation was achieved on the basis of 3sigma MTJ deviation.Magnetic random memory(MRAM)is an important part of future low-power electronic products due to its non-volatile property,fast read-write speed,simple integration in CMOS process and high density stacking.