Design And Implementation Of Channel Simulator With 1GHz Bandwidth

With the rapid development of technology,wireless communication technology is becoming more and more important in this era.Coupled with the accelerated progress of5 g technology commercialization,the requirements of testing all aspects of wireless communication system are gradually becoming higher.As the most basic factor in the design of communication process,wireless propagation characteristics are very important in order to achieve a good design and research of a wireless system.In the process of testing,the actual transmission environment test not only ensures the accuracy of the results,but also has many limitations: too large test instruments lead to a large consumption of human and material resources,unable to reproduce the test environment,low flexibility and low efficiency of the test process.Compared with the above limitations,wireless channel simulator has obvious advantages in test.Users only need to change the channel model and relevant parameters to complete the test of different channels and transmission environments.While ensuring the correctness of the results,it reduces the consumption of human and material resources and test time.This paper firstly introduces the theoretical basis of channel,and focuses on the introduction of wireless channel and its related characteristics.Considering that largescale fading can be eliminated by correlation technology,only small-scale fading is considered in this design.Then,this paper introduces the theoretical model of Rayleigh fading channel — Clarke model and its implementation method,and simulates the model,by analysing the design goal of this design,and finally selects sine wave superposition as the implementation method of this design.Next,the common simulation models of Rayleigh fading channel are introduced,including Jakes model based on Clarke model,and three improved Jakes models.The simulation is carried out to analyze and verify the relevant characteristics of each model.Considering the ideality of the relevant characteristics and the resources consumed in the implementation,the subsequent hardware design is based on the improved model 3 of Jakes model.By changing the relevant parameters of Jakes improved model 3 and simulating it,through the comparison of characteristic curves under each parameter,and considering the comprehensive factors such as resource consumption,the number of superimposed sine waves in the model is finally determined to be 8.Then,this paper designs the implementation structure of the channel simulator,introduces the division of each hardware module,and describes its specific implementation.This design needs to process the signal bandwidth of 1GHz,which is the signal on the intermediate frequency.After I/Q demodulation,I and Q baseband signals of 500 MHz each are obtained,and the AD/DA sampling rate is 2Gsps,if the traditional serial processing method is used,the design will have high requirements for the system clock.Therefore,this design adopts the multi-channel data parallel processing method.In parallel processing mode,high-speed single channel signal is converted into multichannel parallel low-speed signal for processing,which is convenient for the realization of hardware design.Finally,it analyzes whether the results of FPGA(Field Programmable Gate Array)implementation meet the requirements,and finally completes the design of the channel simulator to meet the performance requirements.