Research And Implementation With Software And Hardware Co-Design For Wireless End-to-End Communication

With the development of mobile system,how to improve the transmission speed and reliability of data in wireless system has always been a research hotspot in the communication field.Today,when 5G communication is in full swing,higher requirements are placed on the reliability and throughput of data transmission.Based on the application scene of wireless end-to-end communication,this thesis adopts the method of software and hardware co-design and uses 64-order quadrature amplitude modulation(64QAM)signal to realize the end-to-end data transmission of two communication endpoints on the ZC706 development board.The specific implementation contents are as follows.Firstly,the logic part of Direct Memory Access DMA between WINDOWS and ZC706 is realized in this thesis,which is used for data interaction between the host computer and the development board.Besides,the function of peripheral component interconnect express(PCIE)data transceiver logic is also simulated through Model Sim.According to the characteristics of the PCIE interface of ZC706,the designed driver is loaded and the logic code is tested.Secondly,the algorithm for the key modules in baseband processing is designed in this thesis,mainly carry on the function simulation to the closed-loop feedback structure of Gardner symbol synchronization loop and the joint modulation carrier synchronization loop which uses the methods of Polarity Decision(PD)and Decision Directed(DD).In addition,the thesis proposes a 64 QAM baseband data receiver implementation scheme,which takes advantage of the high flexibility and controllability of the ZYNQ scalable platform,and divides the software and hardware functions of the implementation scheme for the data demodulation link.The main contents are as follows:(1)The PS side completes the high-precision symbol synchronization of the data,and provides the best sampling point data with high accuracy for subsequent carrier synchronization.(2)The other modules of the data are completed by the PL terminal,which mainly include modules such as baseband data modulation circuit,carrier synchronization,and adaptive equalization.(3)In the data interaction interface between PS and PL,data is accessed by two BRAM pieces,and control signal uses AXI-GPIO.The data receiving link scheme based on software and hardware co-design makes full use of the parallel computing power of FPGA and ARM's high-precision realization ability of complex algorithms,which can take into account the processing speed and reliability of data at the same time,and improve the bit error rate performance of wireless end-to-end communication system.Finally,the modules of the entire communication system are integrated to form a complete end-to-end communication link.The data is sent from a PC to the ZYNQ development board by PCIE,and the RF signal is sent and received through the AD9361 software radio platform.After demodulation,it is passed to the receiving PC through the PCIE link to complete the entire communication process.The final test shows that under the wired channel and some wireless channel conditions,the system can achieve 64 QAM signal data transmission more accurately.