Research On The Implementation Of High Order QAM In Wireless Communication

In 4G era, people’s attention on the mobile and portable communication is increasing. But With the expanding range of communication services, the amount of data is showing explosive growth and traditional modulation can’t meet current communications anymore under the condition of increasingly tight spectrum resources. QAM has many advantages over spectral efficiency and anti-interference ability, so it’s widely used in wired or wireless communications.In this paper, high-order QAM technology was researched under the background of wireless communications, based on which a 64 QAM communication system was designed at the same time. The part of baseband is implemented in FGPA, while the RF part is implemented on software radio platform called AD9361. Specific work is as follows:Firstly, designing a system transmission scheme and building the system model which is verified in the Simulink. For the sub transceiver module, this paper gives the simulation results and detailed design principle.Secondly, implementing the models in FPGA and simulating the modular entities in ISE & Modelsim once the quantization precision is selected. For some key modules, this paper also uses some optimization methods. Such as, a global clock management technology is used to ensure the homology of the clock phase of each sub module; high frequency clock is used as computational clock in the carrier synchronization algorithm and blind equalization algorithm, which can accelerate convergence speed and improve the communication efficiency of the system.Finally, debugging and testing the system at the platform of Xilinx’s ML605 and ADI’s AD9361, which is important and difficult part. In the paper, terminal PC software is designed to complete the configuration for AD9361 hardware platform flexibly. In the period of debugging, more attention should be focused on the calibration coefficient of crystal oscillator and clock delay, because the good performance of one system is acquired by adjusting configuration parameters according to the actual hardware characteristics. At the part of data interface, LVDS mode is selected to reduce the noise interference. In FPGA, IDDR and ODDR is easy to use to complete the transformation of different edge of difference signals and data reorganization. After the hardware debugging is completed, a testing for 64 QAM signal is done respectively in Cable and Wireless channels. The final results show that the logical design and functional modules of the system is completely correct, this paper successfully completed the design and of 64 QAM communication system on FPGA.