Design Of Neural Network Based On Memristor Array

Memristor is a new type of dual-terminal device with small feature size,high integration,low power consumption and non-volatile.Its unique electrical characteristics make it very suitable for realizing synapses in artificial neural network.Moreover,the memristor can be integrated on a large scale,and its unique advantage of integrating storage and computing is expected to break the von Neumann bottleneck and provide a new generation of hardware computing platform for artificial neural network.In this context,this thesis focuses on the design of the neural networks based on memristor array,and realizes the memristor MLP and the memristor BNN,which are realized by ex-situ training.The main work and innovations of this thesis are summarized as follows.For the memristor MLP,we design the weight mapping and input feature coding scheme,and propose an array structure based on the memristor reference row combined with the CCVS circuit to realize the positive and negative weight mapping on a memristor.Then we design the function and timing of peripheral control circuit and neuron circuit,and the entire circuit system is modeled using Verilog-AMS language.A three-layer MLP with the scale of 400×100×10 is built.The network is simulated in cadence 17.0 and tested with MNIST data set.The final recognition accuracy is 94.13%,which indicates the correctness of circuit function and timing.Finally,the non ideal characteristic models of memristor are designed and the influence on MLP is explored,including yield model of memristor array,memristor fluctuation and reading noise.For the memristor BNN,the original BNN algorithm is improved,so that the network activation value is 0 and 1,and the weight value is +1 and-1,which will facilitate the mapping of BNN on memristor array.Different scales of BNN are built using Python to provide weight data for memristor BNN.Two kinds of memristor array bnns are built,which are differential pair structure and two memristor reference column structure,which can realize the mapping of positive and negative weight on one memristor.Using Verilog-AMS to build BNN modeling of two memristor array structures for behavioral simulation,the simulation results show that the recognition accuracy of BNNs achieved by the two memristor array structures is consistent with the pure software algorithm achieved,which proves the correctness of the function and timing of the memristor BNN circuit system,and also shows the superiority of the designed mapping algorithm of the BNN and the memristor array.Being compared to the differential pair structure,two memristor reference columns structure can reduce the number of memristors and the time to write the memristor array by nearly 50%.Finally,the influence of the non ideal characteristic of the memristor on BNN is explored.